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@ -257,6 +257,7 @@ void AP_IOMCU_FW::update()
@@ -257,6 +257,7 @@ void AP_IOMCU_FW::update()
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if (dsm_bind_state) { |
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dsm_bind_step(); |
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} |
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GPIO_write(); |
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} |
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} |
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@ -616,6 +617,24 @@ bool AP_IOMCU_FW::handle_code_write()
@@ -616,6 +617,24 @@ bool AP_IOMCU_FW::handle_code_write()
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break; |
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} |
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case PAGE_GPIO: |
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if (rx_io_packet.count != 1) { |
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return false; |
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} |
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memcpy(&GPIO, &rx_io_packet.regs[0] + rx_io_packet.offset, sizeof(GPIO)); |
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if (GPIO.channel_mask != last_GPIO_channel_mask) { |
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for (uint8_t i=0; i<8; i++) { |
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if ((GPIO.channel_mask & (1U << i)) != 0) { |
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hal.rcout->disable_ch(i); |
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hal.gpio->pinMode(101+i, HAL_GPIO_OUTPUT); |
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} else { |
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hal.rcout->enable_ch(i); |
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} |
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} |
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last_GPIO_channel_mask = GPIO.channel_mask; |
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} |
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break; |
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default: |
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break; |
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} |
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@ -749,4 +768,13 @@ void AP_IOMCU_FW::fill_failsafe_pwm(void)
@@ -749,4 +768,13 @@ void AP_IOMCU_FW::fill_failsafe_pwm(void)
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} |
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} |
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void AP_IOMCU_FW::GPIO_write() |
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{ |
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for (uint8_t i=0; i<8; i++) { |
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if ((GPIO.channel_mask & (1U << i)) != 0) { |
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hal.gpio->write(101+i, (GPIO.output_mask & (1U << i)) != 0); |
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} |
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} |
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} |
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AP_HAL_MAIN(); |
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