李孟晓
3 years ago
committed by
Andrew Tridgell
4 changed files with 583 additions and 0 deletions
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/*
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This program is free software: you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation, either version 3 of the License, or |
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(at your option) any later version. |
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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You should have received a copy of the GNU General Public License |
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#include "AP_Baro_ICP201XX.h" |
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#if AP_BARO_ICP201XX_ENABLED |
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#include <AP_HAL/AP_HAL.h> |
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#include <AP_HAL/I2CDevice.h> |
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#include <utility> |
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#include <AP_Common/AP_Common.h> |
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#include <AP_HAL/AP_HAL.h> |
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#include <AP_Math/AP_Math.h> |
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#include <AP_BoardConfig/AP_BoardConfig.h> |
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#include <utility> |
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#include <stdio.h> |
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#include <AP_Math/AP_Math.h> |
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#include <AP_Logger/AP_Logger.h> |
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#include <AP_InertialSensor/AP_InertialSensor_Invensense_registers.h> |
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extern const AP_HAL::HAL &hal; |
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#define ICP201XX_ID 0x63 |
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#define CONVERSION_INTERVAL 25000 |
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#define REG_EMPTY 0x00 |
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#define REG_TRIM1_MSB 0x05 |
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#define REG_TRIM2_LSB 0x06 |
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#define REG_TRIM2_MSB 0x07 |
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#define REG_DEVICE_ID 0x0C |
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#define REG_OTP_MTP_OTP_CFG1 0xAC |
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#define REG_OTP_MTP_MR_LSB 0xAD |
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#define REG_OTP_MTP_MR_MSB 0xAE |
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#define REG_OTP_MTP_MRA_LSB 0xAF |
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#define REG_OTP_MTP_MRA_MSB 0xB0 |
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#define REG_OTP_MTP_MRB_LSB 0xB1 |
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#define REG_OTP_MTP_MRB_MSB 0xB2 |
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#define REG_OTP_MTP_OTP_ADDR 0xB5 |
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#define REG_OTP_MTP_OTP_CMD 0xB6 |
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#define REG_OTP_MTP_RD_DATA 0xB8 |
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#define REG_OTP_MTP_OTP_STATUS 0xB9 |
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#define REG_OTP_DEBUG2 0xBC |
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#define REG_MASTER_LOCK 0xBE |
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#define REG_OTP_MTP_OTP_STATUS2 0xBF |
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#define REG_MODE_SELECT 0xC0 |
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#define REG_INTERRUPT_STATUS 0xC1 |
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#define REG_INTERRUPT_MASK 0xC2 |
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#define REG_FIFO_CONFIG 0xC3 |
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#define REG_FIFO_FILL 0xC4 |
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#define REG_SPI_MODE 0xC5 |
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#define REG_PRESS_ABS_LSB 0xC7 |
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#define REG_PRESS_ABS_MSB 0xC8 |
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#define REG_PRESS_DELTA_LSB 0xC9 |
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#define REG_PRESS_DELTA_MSB 0xCA |
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#define REG_DEVICE_STATUS 0xCD |
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#define REG_I3C_INFO 0xCE |
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#define REG_VERSION 0xD3 |
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#define REG_FIFO_BASE 0xFA |
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/*
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constructor |
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*/ |
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AP_Baro_ICP201XX::AP_Baro_ICP201XX(AP_Baro &baro, AP_HAL::OwnPtr<AP_HAL::I2CDevice> _dev) |
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: AP_Baro_Backend(baro) |
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, dev(std::move(_dev)) |
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{ |
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} |
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AP_Baro_Backend *AP_Baro_ICP201XX::probe(AP_Baro &baro, |
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AP_HAL::OwnPtr<AP_HAL::I2CDevice> dev) |
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{ |
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if (!dev) { |
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return nullptr; |
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} |
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AP_Baro_ICP201XX *sensor = new AP_Baro_ICP201XX(baro, std::move(dev)); |
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if (!sensor || !sensor->init()) { |
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delete sensor; |
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return nullptr; |
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} |
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return sensor; |
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} |
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bool AP_Baro_ICP201XX::init() |
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{ |
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if (!dev) { |
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return false; |
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} |
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dev->get_semaphore()->take_blocking(); |
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uint8_t id = 0xFF; |
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uint8_t ver = 0xFF; |
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read_reg(REG_DEVICE_ID, &id); |
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read_reg(REG_VERSION, &ver); |
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if (id != ICP201XX_ID) { |
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goto failed; |
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} |
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if (ver != 0x00 && ver != 0xB2) { |
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goto failed; |
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} |
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hal.scheduler->delay(10); |
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soft_reset(); |
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if (!boot_sequence()) { |
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goto failed; |
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} |
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if (!configure()) { |
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goto failed; |
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} |
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wait_read(); |
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dev->set_retries(0); |
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instance = _frontend.register_sensor(); |
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dev->set_device_type(DEVTYPE_BARO_ICP201XX); |
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set_bus_id(instance, dev->get_bus_id()); |
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dev->get_semaphore()->give(); |
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dev->register_periodic_callback(CONVERSION_INTERVAL/2, FUNCTOR_BIND_MEMBER(&AP_Baro_ICP201XX::timer, void)); |
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return true; |
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failed: |
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dev->get_semaphore()->give(); |
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return false; |
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} |
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void AP_Baro_ICP201XX::dummy_reg() |
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{ |
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do { |
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uint8_t reg = REG_EMPTY; |
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uint8_t val = 0; |
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dev->transfer(®, 1, &val, 1); |
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} while (0); |
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} |
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bool AP_Baro_ICP201XX::read_reg(uint8_t reg, uint8_t *buf, uint8_t len) |
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{ |
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bool ret; |
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ret = dev->transfer(®, 1, buf, len); |
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dummy_reg(); |
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return ret; |
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} |
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bool AP_Baro_ICP201XX::read_reg(uint8_t reg, uint8_t *val) |
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{ |
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return read_reg(reg, val, 1); |
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} |
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bool AP_Baro_ICP201XX::write_reg(uint8_t reg, uint8_t val) |
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{ |
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bool ret; |
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uint8_t data[2] = { reg, val }; |
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ret = dev->transfer(data, sizeof(data), nullptr, 0); |
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dummy_reg(); |
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return ret; |
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} |
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void AP_Baro_ICP201XX::soft_reset() |
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{ |
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/* Stop the measurement */ |
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mode_select(0x00); |
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hal.scheduler->delay(2); |
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/* Flush FIFO */ |
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flush_fifo(); |
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/* Mask all interrupts */ |
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write_reg(REG_FIFO_CONFIG, 0x00); |
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write_reg(REG_INTERRUPT_MASK, 0xFF); |
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} |
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bool AP_Baro_ICP201XX::mode_select(uint8_t mode) |
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{ |
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uint8_t mode_sync_status = 0; |
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do { |
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read_reg(REG_DEVICE_STATUS, &mode_sync_status, 1); |
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if (mode_sync_status & 0x01) { |
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break; |
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} |
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hal.scheduler->delay(1); |
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} while (1); |
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return write_reg(REG_MODE_SELECT, mode); |
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} |
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bool AP_Baro_ICP201XX::read_otp_data(uint8_t addr, uint8_t cmd, uint8_t *val) |
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{ |
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uint8_t otp_status = 0xFF; |
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/* Write the address content and read command */ |
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if (!write_reg(REG_OTP_MTP_OTP_ADDR, addr)) { |
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return false; |
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} |
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if (!write_reg(REG_OTP_MTP_OTP_CMD, cmd)) { |
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return false; |
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} |
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/* Wait for the OTP read to finish Monitor otp_status */ |
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do { |
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read_reg(REG_OTP_MTP_OTP_STATUS, &otp_status); |
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if (otp_status == 0) { |
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break; |
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} |
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hal.scheduler->delay_microseconds(1); |
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} while (1); |
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/* Read the data from register */ |
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if (!read_reg(REG_OTP_MTP_RD_DATA, val)) { |
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return false; |
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} |
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return true; |
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} |
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bool AP_Baro_ICP201XX::get_sensor_data(float *pressure, float *temperature) |
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{ |
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uint8_t fifo_data[96] {0}; |
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uint8_t fifo_packets = 0; |
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int32_t data_temp = 0; |
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int32_t data_press = 0; |
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*pressure = 0; |
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*temperature = 0; |
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if (read_reg(REG_FIFO_FILL, &fifo_packets)) { |
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fifo_packets = (uint8_t)(fifo_packets & 0x1F); |
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if (fifo_packets > 16) { |
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flush_fifo(); |
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return false; |
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} |
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if (fifo_packets > 0 && fifo_packets <= 16 && read_reg(REG_FIFO_BASE, fifo_data, fifo_packets * 2 * 3)) { |
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uint8_t offset = 0; |
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for (uint8_t i = 0; i < fifo_packets; i++) { |
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data_press = (int32_t)(((fifo_data[offset + 2] & 0x0f) << 16) | (fifo_data[offset + 1] << 8) | fifo_data[offset]); |
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if (data_press & 0x080000) { |
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data_press |= 0xFFF00000; |
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} |
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/* P = (POUT/2^17)*40kPa + 70kPa */ |
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*pressure += ((float)(data_press) * 40 / 131072) + 70; |
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offset += 3; |
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data_temp = (int32_t)(((fifo_data[offset + 2] & 0x0f) << 16) | (fifo_data[offset + 1] << 8) | fifo_data[offset]); |
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if (data_temp & 0x080000) { |
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data_temp |= 0xFFF00000; |
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} |
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/* T = (TOUT/2^18)*65C + 25C */ |
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*temperature += ((float)(data_temp) * 65 / 262144) + 25; |
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offset += 3; |
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} |
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*pressure = *pressure * 1000 / fifo_packets; |
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*temperature = *temperature / fifo_packets; |
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return true; |
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} |
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} |
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return false; |
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} |
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bool AP_Baro_ICP201XX::boot_sequence() |
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{ |
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uint8_t reg_value = 0; |
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uint8_t offset = 0, gain = 0, Hfosc = 0; |
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uint8_t version = 0; |
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uint8_t bootup_status = 0; |
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int ret = 1; |
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/* read version register */ |
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if (!read_reg(REG_VERSION, &version)) { |
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return false; |
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} |
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if (version == 0xB2) { |
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/* B2 version Asic is detected. Boot up sequence is not required for B2 Asic, so returning */ |
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return true; |
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} |
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/* Read boot up status and avoid re running boot up sequence if it is already done */ |
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if (!read_reg(REG_OTP_MTP_OTP_STATUS2, &bootup_status)) { |
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return false; |
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} |
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if (bootup_status & 0x01) { |
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/* Boot up sequence is already done, not required to repeat boot up sequence */ |
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return true; |
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} |
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/* Bring the ASIC in power mode to activate the OTP power domain and get access to the main registers */ |
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mode_select(0x04); |
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hal.scheduler->delay(4); |
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/* Unlock the main registers */ |
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write_reg(REG_MASTER_LOCK, 0x1F); |
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/* Enable the OTP and the write switch */ |
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read_reg(REG_OTP_MTP_OTP_CFG1, ®_value); |
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reg_value |= 0x03; |
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write_reg(REG_OTP_MTP_OTP_CFG1, reg_value); |
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hal.scheduler->delay_microseconds(10); |
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/* Toggle the OTP reset pin */ |
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read_reg(REG_OTP_DEBUG2, ®_value); |
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reg_value |= 1 << 7; |
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write_reg(REG_OTP_DEBUG2, reg_value); |
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hal.scheduler->delay_microseconds(10); |
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read_reg(REG_OTP_DEBUG2, ®_value); |
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reg_value &= ~(1 << 7); |
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write_reg(REG_OTP_DEBUG2, reg_value); |
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hal.scheduler->delay_microseconds(10); |
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/* Program redundant read */ |
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write_reg(REG_OTP_MTP_MRA_LSB, 0x04); |
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write_reg(REG_OTP_MTP_MRA_MSB, 0x04); |
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write_reg(REG_OTP_MTP_MRB_LSB, 0x21); |
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write_reg(REG_OTP_MTP_MRB_MSB, 0x20); |
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write_reg(REG_OTP_MTP_MR_LSB, 0x10); |
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write_reg(REG_OTP_MTP_MR_MSB, 0x80); |
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/* Read the data from register */ |
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ret &= read_otp_data(0xF8, 0x10, &offset); |
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ret &= read_otp_data(0xF9, 0x10, &gain); |
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ret &= read_otp_data(0xFA, 0x10, &Hfosc); |
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hal.scheduler->delay_microseconds(10); |
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/* Write OTP values to main registers */ |
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ret &= read_reg(REG_TRIM1_MSB, ®_value); |
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if (ret) { |
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reg_value = (reg_value & (~0x3F)) | (offset & 0x3F); |
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ret &= write_reg(REG_TRIM1_MSB, reg_value); |
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} |
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ret &= read_reg(REG_TRIM2_MSB, ®_value); |
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if (ret) { |
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reg_value = (reg_value & (~0x70)) | ((gain & 0x07) << 4); |
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ret &= write_reg(REG_TRIM2_MSB, reg_value); |
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} |
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ret &= read_reg(REG_TRIM2_LSB, ®_value); |
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if (ret) { |
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reg_value = (reg_value & (~0x7F)) | (Hfosc & 0x7F); |
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ret &= write_reg(REG_TRIM2_LSB, reg_value); |
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} |
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hal.scheduler->delay_microseconds(10); |
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/* Update boot up status to 1 */ |
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if (ret) { |
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ret &= read_reg(REG_OTP_MTP_OTP_STATUS2, ®_value); |
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if (!ret) { |
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reg_value |= 0x01; |
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ret &= write_reg(REG_OTP_MTP_OTP_STATUS2, reg_value); |
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} |
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} |
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/* Disable OTP and write switch */ |
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read_reg(REG_OTP_MTP_OTP_CFG1, ®_value); |
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reg_value &= ~0x03; |
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write_reg(REG_OTP_MTP_OTP_CFG1, reg_value); |
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/* Lock the main register */ |
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write_reg(REG_MASTER_LOCK, 0x00); |
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/* Move to standby */ |
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mode_select(0x00); |
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return ret; |
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} |
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bool AP_Baro_ICP201XX::configure() |
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{ |
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uint8_t reg_value = 0; |
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/* Initiate Triggered Operation: Stay in Standby mode */ |
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reg_value |= (reg_value & (~0x10)) | ((uint8_t)_forced_meas_trigger << 4); |
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/* Power Mode Selection: Normal Mode */ |
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reg_value |= (reg_value & (~0x04)) | ((uint8_t)_power_mode << 2); |
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/* FIFO Readout Mode Selection: Pressure first. */ |
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reg_value |= (reg_value & (~0x03)) | ((uint8_t)(_fifo_readout_mode)); |
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/* Measurement Configuration: Mode2*/ |
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reg_value |= (reg_value & (~0xE0)) | (((uint8_t)_op_mode) << 5); |
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/* Measurement Mode Selection: Continuous Measurements (duty cycled) */ |
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reg_value |= (reg_value & (~0x08)) | ((uint8_t)_meas_mode << 3); |
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return mode_select(reg_value); |
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} |
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void AP_Baro_ICP201XX::wait_read() |
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{ |
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/*
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* If FIR filter is enabled, it will cause a settling effect on the first 14 pressure values. |
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* Therefore the first 14 pressure output values are discarded. |
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**/ |
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uint8_t fifo_packets = 0; |
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uint8_t fifo_packets_to_skip = 14; |
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do { |
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hal.scheduler->delay(10); |
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read_reg(REG_FIFO_FILL, &fifo_packets); |
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fifo_packets = (uint8_t)(fifo_packets & 0x1F); |
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} while (fifo_packets >= fifo_packets_to_skip); |
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flush_fifo(); |
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fifo_packets = 0; |
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do { |
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hal.scheduler->delay(10); |
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read_reg(REG_FIFO_FILL, &fifo_packets); |
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fifo_packets = (uint8_t)(fifo_packets & 0x1F); |
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} while (fifo_packets == 0); |
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} |
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bool AP_Baro_ICP201XX::flush_fifo() |
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{ |
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uint8_t reg_value; |
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if (!read_reg(REG_FIFO_FILL, ®_value)) { |
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return false; |
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} |
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reg_value |= 0x80; |
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if (!write_reg(REG_FIFO_FILL, reg_value)) { |
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return false; |
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} |
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return true; |
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} |
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void AP_Baro_ICP201XX::timer() |
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{ |
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float p = 0; |
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float t = 0; |
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if (get_sensor_data(&p, &t)) { |
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WITH_SEMAPHORE(_sem); |
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accum.psum += p; |
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accum.tsum += t; |
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accum.count++; |
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last_measure_us = AP_HAL::micros(); |
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} else { |
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if (AP_HAL::micros() - last_measure_us > CONVERSION_INTERVAL*3) { |
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flush_fifo(); |
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last_measure_us = AP_HAL::micros(); |
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} |
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} |
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} |
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void AP_Baro_ICP201XX::update() |
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{ |
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WITH_SEMAPHORE(_sem); |
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if (accum.count > 0) { |
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_copy_to_frontend(instance, accum.psum/accum.count, accum.tsum/accum.count); |
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accum.psum = accum.tsum = 0; |
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accum.count = 0; |
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} |
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} |
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#endif // AP_BARO_ICP201XX_ENABLED
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@ -0,0 +1,85 @@
@@ -0,0 +1,85 @@
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#pragma once |
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#include "AP_Baro_Backend.h" |
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#ifndef AP_BARO_ICP201XX_ENABLED |
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#define AP_BARO_ICP201XX_ENABLED AP_BARO_BACKEND_DEFAULT_ENABLED |
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#endif |
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#if AP_BARO_ICP201XX_ENABLED |
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#include <AP_HAL/AP_HAL.h> |
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#include <AP_HAL/Semaphores.h> |
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#include <AP_HAL/Device.h> |
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class AP_Baro_ICP201XX : public AP_Baro_Backend |
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{ |
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public: |
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void update() override; |
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static AP_Baro_Backend *probe(AP_Baro &baro, AP_HAL::OwnPtr<AP_HAL::I2CDevice> dev); |
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private: |
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AP_Baro_ICP201XX(AP_Baro &baro, AP_HAL::OwnPtr<AP_HAL::I2CDevice> dev); |
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bool init(); |
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void dummy_reg(); |
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bool read_reg(uint8_t reg, uint8_t *buf, uint8_t len); |
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bool read_reg(uint8_t reg, uint8_t *val); |
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bool write_reg(uint8_t reg, uint8_t val); |
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bool mode_select(uint8_t mode); |
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bool read_otp_data(uint8_t addr, uint8_t cmd, uint8_t *val); |
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bool get_sensor_data(float *pressure, float *temperature); |
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void soft_reset(); |
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bool boot_sequence(); |
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bool configure(); |
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void wait_read(); |
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bool flush_fifo(); |
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void timer(); |
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|
||||
uint8_t instance; |
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|
||||
AP_HAL::OwnPtr<AP_HAL::I2CDevice> dev; |
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|
||||
// accumulation structure, protected by _sem
|
||||
struct { |
||||
float tsum; |
||||
float psum; |
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uint32_t count; |
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} accum; |
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|
||||
// time last read command was sent
|
||||
uint32_t last_measure_us; |
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|
||||
enum class OP_MODE : uint8_t { |
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OP_MODE0 = 0, /* Mode 0: Bw:6.25 Hz ODR: 25Hz */ |
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OP_MODE1, /* Mode 1: Bw:30 Hz ODR: 120Hz */ |
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OP_MODE2, /* Mode 2: Bw:10 Hz ODR: 40Hz */ |
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OP_MODE3, /* Mode 3: Bw:0.5 Hz ODR: 2Hz */ |
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OP_MODE4, /* Mode 4: User configurable Mode */ |
||||
} _op_mode{OP_MODE::OP_MODE2}; |
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|
||||
enum class FIFO_READOUT_MODE : uint8_t { |
||||
FIFO_READOUT_MODE_PRES_TEMP = 0, /* Pressure and temperature as pair and address wraps to the start address of the Pressure value ( pressure first ) */ |
||||
FIFO_READOUT_MODE_TEMP_ONLY = 1, /* Temperature only reporting */ |
||||
FIFO_READOUT_MODE_TEMP_PRES = 2, /* Pressure and temperature as pair and address wraps to the start address of the Temperature value ( Temperature first ) */ |
||||
FIFO_READOUT_MODE_PRES_ONLY = 3 /* Pressure only reporting */ |
||||
} _fifo_readout_mode{FIFO_READOUT_MODE::FIFO_READOUT_MODE_PRES_TEMP}; |
||||
|
||||
enum class POWER_MODE : uint8_t { |
||||
POWER_MODE_NORMAL = 0, /* Normal Mode: Device is in standby and goes to active mode during the execution of a measurement */ |
||||
POWER_MODE_ACTIVE = 1 /* Active Mode: Power on DVDD and enable the high frequency clock */ |
||||
} _power_mode{POWER_MODE::POWER_MODE_NORMAL}; |
||||
|
||||
enum MEAS_MODE : uint8_t { |
||||
MEAS_MODE_FORCED_TRIGGER = 0, /* Force trigger mode based on icp201xx_forced_meas_trigger_t **/ |
||||
MEAS_MODE_CONTINUOUS = 1 /* Continuous measurements based on selected mode ODR settings*/ |
||||
} _meas_mode{MEAS_MODE::MEAS_MODE_CONTINUOUS}; |
||||
|
||||
enum FORCED_MEAS_TRIGGER : uint8_t { |
||||
FORCE_MEAS_STANDBY = 0, /* Stay in Stand by */ |
||||
FORCE_MEAS_TRIGGER_FORCE_MEAS = 1 /* Trigger for forced measurements */ |
||||
} _forced_meas_trigger{FORCED_MEAS_TRIGGER::FORCE_MEAS_STANDBY}; |
||||
}; |
||||
|
||||
#endif // AP_BARO_ICP201XX_ENABLED
|
Loading…
Reference in new issue