Browse Source
this gives a common printf implementation on all boards, which simplifies testing, and also simplifies porting to new boardsmission-4.1.18
Andrew Tridgell
12 years ago
11 changed files with 28 additions and 546 deletions
@ -1,65 +0,0 @@
@@ -1,65 +0,0 @@
|
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#include <AP_HAL.h> |
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#if CONFIG_HAL_BOARD == HAL_BOARD_APM1 || CONFIG_HAL_BOARD == HAL_BOARD_APM2 |
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#include "Util.h" |
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#include "utility/print_vprintf.h" |
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using namespace AP_HAL_AVR; |
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|
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/* Helper class implements AP_HAL::Print so we can use utility/vprintf */ |
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class BufferPrinter : public AP_HAL::Print { |
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public: |
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BufferPrinter(char* str, size_t size) : _offs(0), _str(str), _size(size) {} |
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size_t write(uint8_t c) { |
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if (_offs < _size) { |
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_str[_offs] = c; |
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_offs++; |
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return 1; |
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} else { |
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return 0; |
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} |
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} |
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size_t _offs;
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char* const _str; |
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const size_t _size; |
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}; |
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int AVRUtil::snprintf(char* str, size_t size, const char *format, ...) |
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{ |
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va_list ap; |
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va_start(ap, format); |
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int res = this->vsnprintf(str, size, format, ap); |
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va_end(ap); |
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return res; |
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} |
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int AVRUtil::snprintf_P(char* str, size_t size, const prog_char_t *format, ...) |
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{ |
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va_list ap; |
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va_start(ap, format); |
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int res = this->vsnprintf_P(str, size, format, ap); |
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va_end(ap); |
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return res; |
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} |
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|
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int AVRUtil::vsnprintf(char* str, size_t size, const char *format, va_list ap) |
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{ |
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BufferPrinter buf(str, size); |
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print_vprintf(&buf, 0, format, ap); |
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return (int) buf._offs; |
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} |
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|
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int AVRUtil::vsnprintf_P(char* str, size_t size, const prog_char_t *format, |
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va_list ap) |
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{ |
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BufferPrinter buf(str, size); |
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print_vprintf(&buf, 1,(const char*) format, ap); |
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if (buf._offs < size) { |
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// null terminate if possible
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str[buf._offs] = 0; |
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} |
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return (int) buf._offs; |
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} |
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#endif |
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@ -1,369 +0,0 @@
@@ -1,369 +0,0 @@
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/* Copyright (c) 2002, 2005, 2006, 2007 Marek Michalkiewicz |
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Copyright (c) 2006 Dmitry Xmelkov |
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All rights reserved. |
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|
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Redistribution and use in source and binary forms, with or without |
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modification, are permitted provided that the following conditions are met: |
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|
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* Redistributions of source code must retain the above copyright |
||||
notice, this list of conditions and the following disclaimer. |
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|
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* Redistributions in binary form must reproduce the above copyright |
||||
notice, this list of conditions and the following disclaimer in |
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the documentation and/or other materials provided with the |
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distribution. |
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|
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* Neither the name of the copyright holders nor the names of |
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contributors may be used to endorse or promote products derived |
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from this software without specific prior written permission. |
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|
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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POSSIBILITY OF SUCH DAMAGE. */ |
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|
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#include <AP_HAL_Boards.h> |
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#if CONFIG_HAL_BOARD == HAL_BOARD_APM1 || CONFIG_HAL_BOARD == HAL_BOARD_APM2 |
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/* |
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macros.inc - macros for use in assembler sources |
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|
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Contributors: |
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Created by Marek Michalkiewicz <marekm@linux.org.pl> |
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*/ |
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#include <avr/io.h> |
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//#include "sectionname.h" |
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/* if not defined, assume old version with underscores */ |
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#ifndef __USER_LABEL_PREFIX__ |
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#define __USER_LABEL_PREFIX__ _ |
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#endif |
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#ifndef __REGISTER_PREFIX__ |
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#define __REGISTER_PREFIX__ |
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#endif |
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/* the assembler line separator (just in case it ever changes) */ |
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#define _L $ |
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#define CONCAT1(a, b) CONCAT2(a, b) |
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#define CONCAT2(a, b) a ## b |
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#define _U(x) CONCAT1(__USER_LABEL_PREFIX__, x) |
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#define _R(x) CONCAT1(__REGISTER_PREFIX__, x) |
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/* these should help to fix the "can't have function named r1()" bug |
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which may require adding '%' in front of register names. */ |
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#define r0 _R(r0) |
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#define r1 _R(r1) |
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#define r2 _R(r2) |
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#define r3 _R(r3) |
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#define r4 _R(r4) |
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#define r5 _R(r5) |
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#define r6 _R(r6) |
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#define r7 _R(r7) |
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#define r8 _R(r8) |
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#define r9 _R(r9) |
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#define r10 _R(r10) |
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#define r11 _R(r11) |
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#define r12 _R(r12) |
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#define r13 _R(r13) |
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#define r14 _R(r14) |
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#define r15 _R(r15) |
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#define r16 _R(r16) |
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#define r17 _R(r17) |
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#define r18 _R(r18) |
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#define r19 _R(r19) |
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#define r20 _R(r20) |
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#define r21 _R(r21) |
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#define r22 _R(r22) |
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#define r23 _R(r23) |
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#define r24 _R(r24) |
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#define r25 _R(r25) |
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#define r26 _R(r26) |
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#define r27 _R(r27) |
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#define r28 _R(r28) |
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#define r29 _R(r29) |
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#define r30 _R(r30) |
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#define r31 _R(r31) |
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|
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#ifndef __tmp_reg__ |
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#define __tmp_reg__ r0 |
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#endif |
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|
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#ifndef __zero_reg__ |
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#define __zero_reg__ r1 |
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#endif |
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|
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#if __AVR_MEGA__ |
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#define XJMP jmp |
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#define XCALL call |
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#else |
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#define XJMP rjmp |
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#define XCALL rcall |
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#endif |
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/* used only by fplib/strtod.S - libgcc internal function calls */ |
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#define PROLOGUE_SAVES(offset) XJMP (__prologue_saves__ + 2 * (offset)) |
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#define EPILOGUE_RESTORES(offset) XJMP (__epilogue_restores__ + 2 * (offset)) |
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|
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#if FLASHEND > 0x10000 /* ATmega103 */ |
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#define BIG_CODE 1 |
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#else |
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#define BIG_CODE 0 |
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#endif |
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#ifndef __AVR_HAVE_MOVW__ |
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# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ |
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# define __AVR_HAVE_MOVW__ 1 |
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# endif |
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#endif |
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|
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#ifndef __AVR_HAVE_LPMX__ |
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# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ |
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# define __AVR_HAVE_LPMX__ 1 |
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# endif |
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#endif |
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|
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#ifndef __AVR_HAVE_MUL__ |
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# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ |
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# define __AVR_HAVE_MUL__ 1 |
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# endif |
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#endif |
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/* |
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Smart version of movw: |
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- uses "movw" if possible (supported by MCU, and both registers even) |
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- handles overlapping register pairs correctly |
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- no instruction generated if source and destination are the same |
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(may expand to 0, 1 or 2 instructions). |
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*/ |
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|
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.macro X_movw dst src |
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.L_movw_dst = -1 |
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.L_movw_src = -1 |
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.L_movw_n = 0 |
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.irp reg, r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, \ |
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r10,r11,r12,r13,r14,r15,r16,r17,r18,r19, \ |
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r20,r21,r22,r23,r24,r25,r26,r27,r28,r29, \ |
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r30,r31 |
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.ifc \reg,\dst |
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.L_movw_dst = .L_movw_n |
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.endif |
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.ifc \reg,\src |
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.L_movw_src = .L_movw_n |
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.endif |
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.L_movw_n = .L_movw_n + 1 |
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.endr |
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.L_movw_n = 0 |
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.irp reg, R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, \ |
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R10,R11,R12,R13,R14,R15,R16,R17,R18,R19, \ |
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R20,R21,R22,R23,R24,R25,R26,R27,R28,R29, \ |
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R30,R31 |
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.ifc \reg,\dst |
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.L_movw_dst = .L_movw_n |
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.endif |
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.ifc \reg,\src |
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.L_movw_src = .L_movw_n |
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.endif |
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.L_movw_n = .L_movw_n + 1 |
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.endr |
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.if .L_movw_dst < 0 |
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.L_movw_n = 0 |
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.rept 32 |
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.if \dst == .L_movw_n |
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.L_movw_dst = .L_movw_n |
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.endif |
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.L_movw_n = .L_movw_n + 1 |
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.endr |
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.endif |
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.if .L_movw_src < 0 |
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.L_movw_n = 0 |
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.rept 32 |
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.if \src == .L_movw_n |
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.L_movw_src = .L_movw_n |
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.endif |
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.L_movw_n = .L_movw_n + 1 |
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.endr |
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.endif |
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.if (.L_movw_dst < 0) || (.L_movw_src < 0) |
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.err ; Invalid 'X_movw' arg. |
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.endif |
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|
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.if ((.L_movw_src) - (.L_movw_dst)) /* different registers */ |
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.if (((.L_movw_src) | (.L_movw_dst)) & 0x01) |
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.if (((.L_movw_src)-(.L_movw_dst)) & 0x80) /* src < dest */ |
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mov (.L_movw_dst)+1, (.L_movw_src)+1 |
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mov (.L_movw_dst), (.L_movw_src) |
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.else /* src > dest */ |
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mov (.L_movw_dst), (.L_movw_src) |
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mov (.L_movw_dst)+1, (.L_movw_src)+1 |
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.endif |
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.else /* both even -> overlap not possible */ |
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#if defined(__AVR_HAVE_MOVW__) && __AVR_HAVE_MOVW__ |
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movw \dst, \src |
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#else |
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mov (.L_movw_dst), (.L_movw_src) |
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mov (.L_movw_dst)+1, (.L_movw_src)+1 |
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#endif |
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.endif |
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.endif |
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.endm |
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|
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/* Macro 'X_lpm' extends enhanced lpm instruction for classic chips. |
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Usage: |
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X_lpm reg, dst |
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where |
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reg is 0..31, r0..r31 or R0..R31 |
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dst is z, Z, z+ or Z+ |
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It is possible to omit both arguments. |
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Possible results for classic chips: |
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lpm |
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lpm / mov Rd,r0 |
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lpm / adiw ZL,1 |
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lpm / mov Rd,r0 / adiw ZL,1 |
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For enhanced chips it is one instruction always. |
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|
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ATTENTION: unlike enhanced chips SREG (S,V,N,Z,C) flags are |
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changed in case of 'Z+' dst. R0 is scratch. |
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*/ |
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.macro X_lpm dst=r0, src=Z |
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|
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/* dst evaluation */ |
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.L_lpm_dst = -1 |
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|
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.L_lpm_n = 0 |
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.irp reg, r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, \ |
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r10,r11,r12,r13,r14,r15,r16,r17,r18,r19, \ |
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r20,r21,r22,r23,r24,r25,r26,r27,r28,r29, \ |
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r30,r31 |
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.ifc \reg,\dst |
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.L_lpm_dst = .L_lpm_n |
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.endif |
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.L_lpm_n = .L_lpm_n + 1 |
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.endr |
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|
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.L_lpm_n = 0 |
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.irp reg, R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, \ |
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R10,R11,R12,R13,R14,R15,R16,R17,R18,R19, \ |
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R20,R21,R22,R23,R24,R25,R26,R27,R28,R29, \ |
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R30,R31 |
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.ifc \reg,\dst |
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.L_lpm_dst = .L_lpm_n |
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.endif |
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.L_lpm_n = .L_lpm_n + 1 |
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.endr |
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|
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.if .L_lpm_dst < 0 |
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.L_lpm_n = 0 |
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.rept 32 |
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.if \dst == .L_lpm_n |
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.L_lpm_dst = .L_lpm_n |
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.endif |
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.L_lpm_n = .L_lpm_n + 1 |
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.endr |
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.endif |
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|
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.if (.L_lpm_dst < 0) |
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.err ; Invalid dst arg of 'X_lpm' macro. |
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.endif |
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|
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/* src evaluation */ |
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.L_lpm_src = -1 |
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.L_lpm_n = 0 |
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.irp reg, z,Z,z+,Z+ |
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.ifc \reg,\src |
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.L_lpm_src = .L_lpm_n |
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.endif |
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.L_lpm_n = .L_lpm_n + 1 |
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.endr |
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|
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.if (.L_lpm_src < 0) |
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.err ; Invalid src arg of 'X_lpm' macro. |
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.endif |
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|
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/* instruction(s) */ |
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.if .L_lpm_src < 2 |
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.if .L_lpm_dst == 0 |
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lpm |
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.else |
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#if defined(__AVR_HAVE_LPMX__) && __AVR_HAVE_LPMX__ |
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lpm .L_lpm_dst, Z |
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#else |
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lpm |
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mov .L_lpm_dst, r0 |
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#endif |
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.endif |
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.else |
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.if (.L_lpm_dst >= 30) |
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.err ; Registers 30 and 31 are inhibited as 'X_lpm *,Z+' dst. |
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.endif |
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#if defined(__AVR_HAVE_LPMX__) && __AVR_HAVE_LPMX__ |
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lpm .L_lpm_dst, Z+ |
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#else |
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lpm |
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.if .L_lpm_dst |
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mov .L_lpm_dst, r0 |
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.endif |
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adiw r30, 1 |
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#endif |
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.endif |
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.endm |
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|
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/* |
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LPM_R0_ZPLUS_INIT is used before the loop to initialize RAMPZ |
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for future devices with RAMPZ:Z auto-increment - [e]lpm r0, Z+. |
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|
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LPM_R0_ZPLUS_NEXT is used inside the loop to load a byte from |
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the program memory at [RAMPZ:]Z to R0, and increment [RAMPZ:]Z. |
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|
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The argument in both macros is a register that contains the |
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high byte (bits 23-16) of the address, bits 15-0 should be in |
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the Z (r31:r30) register. It can be any register except for: |
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r0, r1 (__zero_reg__ - assumed to always contain 0), r30, r31. |
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*/ |
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|
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.macro LPM_R0_ZPLUS_INIT hhi |
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#if __AVR_ENHANCED__ |
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#if BIG_CODE |
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out AVR_RAMPZ_ADDR, \hhi |
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#endif |
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#endif |
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.endm |
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|
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.macro LPM_R0_ZPLUS_NEXT hhi |
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#if __AVR_ENHANCED__ |
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#if BIG_CODE |
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/* ELPM with RAMPZ:Z post-increment, load RAMPZ only once */ |
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elpm r0, Z+ |
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#else |
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/* LPM with Z post-increment, max 64K, no RAMPZ (ATmega83/161/163/32) */ |
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lpm r0, Z+ |
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#endif |
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#else |
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#if BIG_CODE |
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/* ELPM without post-increment, load RAMPZ each time (ATmega103) */ |
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out AVR_RAMPZ_ADDR, \hhi |
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elpm |
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adiw r30,1 |
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adc \hhi, __zero_reg__ |
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#else |
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/* LPM without post-increment, max 64K, no RAMPZ (AT90S*) */ |
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lpm |
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adiw r30,1 |
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#endif |
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#endif |
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.endm |
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#endif |
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@ -1,54 +0,0 @@
@@ -1,54 +0,0 @@
|
||||
/* Copyright (c) 2007, Dmitry Xmelkov
|
||||
All rights reserved. |
||||
|
||||
Redistribution and use in source and binary forms, with or without |
||||
modification, are permitted provided that the following conditions are met: |
||||
|
||||
* Redistributions of source code must retain the above copyright |
||||
notice, this list of conditions and the following disclaimer. |
||||
* Redistributions in binary form must reproduce the above copyright |
||||
notice, this list of conditions and the following disclaimer in |
||||
the documentation and/or other materials provided with the |
||||
distribution. |
||||
* Neither the name of the copyright holders nor the names of |
||||
contributors may be used to endorse or promote products derived |
||||
from this software without specific prior written permission. |
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
POSSIBILITY OF SUCH DAMAGE. */ |
||||
|
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/* $Id: ntz.h 1217 2007-02-18 13:18:05Z dmix $ */ |
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|
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#ifndef _NTZ_H |
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#define _NTZ_H |
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|
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/* Number of Tail Zeros: ntz(x)= (ffs(x) ? ffs(x)-1 : 16)
|
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It works with all: cpp, gcc and gas expressions. */ |
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#define ntz(x) \ |
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( (1 & (((x) & 1) == 0)) \
|
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+ (1 & (((x) & 3) == 0)) \
|
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+ (1 & (((x) & 7) == 0)) \
|
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+ (1 & (((x) & 017) == 0)) \
|
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+ (1 & (((x) & 037) == 0)) \
|
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+ (1 & (((x) & 077) == 0)) \
|
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+ (1 & (((x) & 0177) == 0)) \
|
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+ (1 & (((x) & 0377) == 0)) \
|
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+ (1 & (((x) & 0777) == 0)) \
|
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+ (1 & (((x) & 01777) == 0)) \
|
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+ (1 & (((x) & 03777) == 0)) \
|
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+ (1 & (((x) & 07777) == 0)) \
|
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+ (1 & (((x) & 017777) == 0)) \
|
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+ (1 & (((x) & 037777) == 0)) \
|
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+ (1 & (((x) & 077777) == 0)) \
|
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+ (1 & (((x) & 0177777) == 0)) ) |
||||
|
||||
#endif /* !_NTZ_H */ |
||||
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