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@ -4,6 +4,7 @@
@@ -4,6 +4,7 @@
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#ifndef HAVE_FEENABLEEXCEPT |
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#if defined(__APPLE__) && defined(__MACH__) |
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#if defined __i386__ || defined __x86_64__ |
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// Public domain polyfill for feenableexcept on OS X
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// http://www-personal.umich.edu/~williams/archive/computation/fe-handling-example.c
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@ -46,6 +47,70 @@ inline int fedisableexcept(unsigned int excepts)
@@ -46,6 +47,70 @@ inline int fedisableexcept(unsigned int excepts)
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return fesetenv(&fenv) ? -1 : old_excepts; |
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} |
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#elif defined __arm64__ |
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/*
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Yoinked and adapted this ARM64 implementation of floating point exceptions from |
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https://android.googlesource.com/platform/bionic/+/a147a1d/libm/arm64/fenv.c
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*/ |
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/*-
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* Copyright (c) 2004 David Schultz <das@FreeBSD.ORG> |
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* All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* $FreeBSD: libm/aarch64/fenv.c $ |
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*/ |
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#define FPCR_EXCEPT_SHIFT 8 |
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// FPCR, Floating-point Control Register.
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#define __get_fpcr(__fpcr) __asm__ __volatile__("mrs %0,fpcr" : "=r" (__fpcr)) |
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#define __set_fpcr(__fpcr) __asm__ __volatile__("msr fpcr,%0" : :"ri" (__fpcr)) |
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inline int feenableexcept(int mask) { |
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unsigned long long old_fpcr, new_fpcr; |
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__get_fpcr(old_fpcr); |
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new_fpcr = old_fpcr | ((mask & FE_ALL_EXCEPT) << FPCR_EXCEPT_SHIFT); |
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if (new_fpcr != old_fpcr) { |
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__set_fpcr(new_fpcr); |
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} |
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return ((old_fpcr >> FPCR_EXCEPT_SHIFT) & FE_ALL_EXCEPT); |
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} |
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inline int fedisableexcept(int mask) { |
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unsigned long long old_fpcr, new_fpcr; |
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__get_fpcr(old_fpcr); |
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new_fpcr = old_fpcr & ~((mask & FE_ALL_EXCEPT) << FPCR_EXCEPT_SHIFT); |
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if (new_fpcr != old_fpcr) { |
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__set_fpcr(new_fpcr); |
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} |
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return ((old_fpcr >> FPCR_EXCEPT_SHIFT) & FE_ALL_EXCEPT); |
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} |
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#endif |
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#else |
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inline int feenableexcept(unsigned int excepts) |
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{ |
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