when a peripheral is made available via BRD_ALT_CONFIG we need to
remap the existing ioline_t in the UART and I2C drivers to use the new
pin.
This fixes an issue with half-duplex, inverted, swapped UART pins for
protocols like FPort and FPort2
This implements a max quota of GPIO interrupts per 100ms period to
prevent high interrupt counts from consuming all CPU and causing a
lockup. The limit is set as 10k interrupts per 0.1s period. That limit
should be high enough for all reasonable uses of GPIO interrupt
handlers while being below the level that causes significant CPU loads
and flight issues
This addresses issue #15384
Andrew Tridgell
Mirko Denecke
Peter Barker
Michael du Breuil