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641 lines
19 KiB
641 lines
19 KiB
/* |
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* This file is free software: you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This file is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
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* See the GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License along |
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* with this program. If not, see <http://www.gnu.org/licenses/>. |
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* |
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* Code by Andrew Tridgell and Siddharth Bharat Purohit |
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*/ |
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#include <AP_HAL/AP_HAL.h> |
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|
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#if CONFIG_HAL_BOARD == HAL_BOARD_CHIBIOS |
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#include "UARTDriver.h" |
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#include "GPIO.h" |
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#include <usbcfg.h> |
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#include "shared_dma.h" |
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|
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extern const AP_HAL::HAL& hal; |
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|
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using namespace ChibiOS; |
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#ifdef HAL_USB_VENDOR_ID |
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// USB has been configured in hwdef.dat |
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#define HAVE_USB_SERIAL |
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#endif |
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const UARTDriver::SerialDef UARTDriver::_serial_tab[] = { HAL_UART_DEVICE_LIST }; |
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// event used to wake up waiting thread |
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#define EVT_DATA EVENT_MASK(0) |
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UARTDriver::UARTDriver(uint8_t serial_num) : |
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tx_bounce_buf_ready(true), |
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sdef(_serial_tab[serial_num]), |
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_baudrate(57600), |
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_in_timer(false), |
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_initialised(false) |
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{ |
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chMtxObjectInit(&_write_mutex); |
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} |
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void UARTDriver::begin(uint32_t b, uint16_t rxS, uint16_t txS) |
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{ |
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hal.gpio->pinMode(2, HAL_GPIO_OUTPUT); |
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hal.gpio->pinMode(3, HAL_GPIO_OUTPUT); |
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if (sdef.serial == nullptr) { |
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return; |
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} |
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bool was_initialised = _initialised; |
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uint16_t min_tx_buffer = 4096; |
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uint16_t min_rx_buffer = 1024; |
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// on PX4 we have enough memory to have a larger transmit and |
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// receive buffer for all ports. This means we don't get delays |
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// while waiting to write GPS config packets |
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if (txS < min_tx_buffer) { |
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txS = min_tx_buffer; |
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} |
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if (rxS < min_rx_buffer) { |
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rxS = min_rx_buffer; |
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} |
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/* |
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allocate the read buffer |
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we allocate buffers before we successfully open the device as we |
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want to allocate in the early stages of boot, and cause minimum |
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thrashing of the heap once we are up. The ttyACM0 driver may not |
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connect for some time after boot |
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*/ |
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if (rxS != _readbuf.get_size()) { |
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_initialised = false; |
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while (_in_timer) { |
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hal.scheduler->delay(1); |
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} |
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_readbuf.set_size(rxS); |
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} |
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if (b != 0) { |
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_baudrate = b; |
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} |
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/* |
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allocate the write buffer |
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*/ |
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if (txS != _writebuf.get_size()) { |
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_initialised = false; |
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while (_in_timer) { |
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hal.scheduler->delay(1); |
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} |
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_writebuf.set_size(txS); |
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} |
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if (sdef.is_usb) { |
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#ifdef HAVE_USB_SERIAL |
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/* |
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* Initializes a serial-over-USB CDC driver. |
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*/ |
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if (!was_initialised) { |
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sduObjectInit((SerialUSBDriver*)sdef.serial); |
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sduStart((SerialUSBDriver*)sdef.serial, &serusbcfg); |
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/* |
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* Activates the USB driver and then the USB bus pull-up on D+. |
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* Note, a delay is inserted in order to not have to disconnect the cable |
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* after a reset. |
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*/ |
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usbDisconnectBus(serusbcfg.usbp); |
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hal.scheduler->delay_microseconds(1500); |
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usbStart(serusbcfg.usbp, &usbcfg); |
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usbConnectBus(serusbcfg.usbp); |
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} |
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#endif |
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} else { |
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if (_baudrate != 0) { |
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//setup Rx DMA |
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if(!was_initialised) { |
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if(sdef.dma_rx) { |
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rxdma = STM32_DMA_STREAM(sdef.dma_rx_stream_id); |
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bool dma_allocated = dmaStreamAllocate(rxdma, |
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12, //IRQ Priority |
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(stm32_dmaisr_t)rxbuff_full_irq, |
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(void *)this); |
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osalDbgAssert(!dma_allocated, "stream already allocated"); |
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dmaStreamSetPeripheral(rxdma, &((SerialDriver*)sdef.serial)->usart->DR); |
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} |
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if (sdef.dma_tx) { |
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// we only allow for sharing of the TX DMA channel, not the RX |
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// DMA channel, as the RX side is active all the time, so |
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// cannot be shared |
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dma_handle = new Shared_DMA(sdef.dma_tx_stream_id, |
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SHARED_DMA_NONE, |
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FUNCTOR_BIND_MEMBER(&UARTDriver::dma_tx_allocate, void), |
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FUNCTOR_BIND_MEMBER(&UARTDriver::dma_tx_deallocate, void)); |
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} |
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} |
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sercfg.speed = _baudrate; |
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if (!sdef.dma_tx && !sdef.dma_rx) { |
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sercfg.cr1 = 0; |
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sercfg.cr3 = 0; |
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} else { |
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if (sdef.dma_rx) { |
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sercfg.cr1 = USART_CR1_IDLEIE; |
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sercfg.cr3 = USART_CR3_DMAR; |
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} |
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if (sdef.dma_tx) { |
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sercfg.cr3 |= USART_CR3_DMAT; |
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} |
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} |
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sercfg.cr2 = USART_CR2_STOP1_BITS; |
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sercfg.irq_cb = rx_irq_cb; |
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sercfg.ctx = (void*)this; |
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sdStart((SerialDriver*)sdef.serial, &sercfg); |
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if(sdef.dma_rx) { |
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//Configure serial driver to skip handling RX packets |
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//because we will handle them via DMA |
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((SerialDriver*)sdef.serial)->usart->CR1 &= ~USART_CR1_RXNEIE; |
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//Start DMA |
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if(!was_initialised) { |
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uint32_t dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
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dmamode |= STM32_DMA_CR_CHSEL(STM32_DMA_GETCHANNEL(sdef.dma_rx_stream_id, |
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sdef.dma_rx_channel_id)); |
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dmamode |= STM32_DMA_CR_PL(0); |
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dmaStreamSetMemory0(rxdma, rx_bounce_buf); |
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dmaStreamSetTransactionSize(rxdma, RX_BOUNCE_BUFSIZE); |
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dmaStreamSetMode(rxdma, dmamode | STM32_DMA_CR_DIR_P2M | |
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STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE); |
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dmaStreamEnable(rxdma); |
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} |
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} |
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} |
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} |
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if (_writebuf.get_size() && _readbuf.get_size()) { |
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_initialised = true; |
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} |
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_uart_owner_thd = chThdGetSelfX(); |
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|
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// setup flow control |
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set_flow_control(_flow_control); |
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} |
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void UARTDriver::dma_tx_allocate(void) |
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{ |
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osalDbgAssert(txdma == nullptr, "double DMA allocation"); |
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txdma = STM32_DMA_STREAM(sdef.dma_tx_stream_id); |
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bool dma_allocated = dmaStreamAllocate(txdma, |
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12, //IRQ Priority |
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(stm32_dmaisr_t)tx_complete, |
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(void *)this); |
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osalDbgAssert(!dma_allocated, "stream already allocated"); |
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dmaStreamSetPeripheral(txdma, &((SerialDriver*)sdef.serial)->usart->DR); |
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} |
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void UARTDriver::dma_tx_deallocate(void) |
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{ |
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chSysLock(); |
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dmaStreamRelease(txdma); |
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txdma = nullptr; |
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chSysUnlock(); |
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} |
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void UARTDriver::tx_complete(void* self, uint32_t flags) |
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{ |
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UARTDriver* uart_drv = (UARTDriver*)self; |
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uart_drv->dma_handle->unlock_from_IRQ(); |
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uart_drv->_last_write_completed_us = AP_HAL::micros(); |
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uart_drv->tx_bounce_buf_ready = true; |
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} |
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void UARTDriver::rx_irq_cb(void* self) |
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{ |
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UARTDriver* uart_drv = (UARTDriver*)self; |
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if (!uart_drv->sdef.dma_rx) { |
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return; |
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} |
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volatile uint16_t sr = ((SerialDriver*)(uart_drv->sdef.serial))->usart->SR; |
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if(sr & USART_SR_IDLE) { |
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volatile uint16_t dr = ((SerialDriver*)(uart_drv->sdef.serial))->usart->DR; |
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(void)dr; |
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//disable dma, triggering DMA transfer complete interrupt |
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uart_drv->rxdma->stream->CR &= ~STM32_DMA_CR_EN; |
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} |
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} |
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void UARTDriver::rxbuff_full_irq(void* self, uint32_t flags) |
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{ |
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UARTDriver* uart_drv = (UARTDriver*)self; |
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if (uart_drv->_lock_rx_in_timer_tick) { |
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return; |
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} |
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if (!uart_drv->sdef.dma_rx) { |
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return; |
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} |
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uint8_t len = RX_BOUNCE_BUFSIZE - uart_drv->rxdma->stream->NDTR; |
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if (len == 0) { |
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return; |
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} |
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uart_drv->_readbuf.write(uart_drv->rx_bounce_buf, len); |
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//restart the DMA transfers |
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dmaStreamSetMemory0(uart_drv->rxdma, uart_drv->rx_bounce_buf); |
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dmaStreamSetTransactionSize(uart_drv->rxdma, RX_BOUNCE_BUFSIZE); |
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dmaStreamEnable(uart_drv->rxdma); |
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if (uart_drv->_wait.thread_ctx && uart_drv->_readbuf.available() >= uart_drv->_wait.n) { |
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chSysLockFromISR(); |
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chEvtSignalI(uart_drv->_wait.thread_ctx, EVT_DATA); |
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chSysUnlockFromISR(); |
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} |
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if (uart_drv->_rts_is_active) { |
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uart_drv->update_rts_line(); |
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} |
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} |
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void UARTDriver::begin(uint32_t b) |
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{ |
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begin(b, 0, 0); |
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} |
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void UARTDriver::end() |
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{ |
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_initialised = false; |
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while (_in_timer) hal.scheduler->delay(1); |
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if (sdef.is_usb) { |
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#ifdef HAVE_USB_SERIAL |
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sduStop((SerialUSBDriver*)sdef.serial); |
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#endif |
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} else { |
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sdStop((SerialDriver*)sdef.serial); |
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} |
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_readbuf.set_size(0); |
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_writebuf.set_size(0); |
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} |
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void UARTDriver::flush() |
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{ |
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if (sdef.is_usb) { |
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#ifdef HAVE_USB_SERIAL |
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sduSOFHookI((SerialUSBDriver*)sdef.serial); |
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#endif |
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} else { |
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//TODO: Handle this for other serial ports |
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} |
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} |
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bool UARTDriver::is_initialized() |
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{ |
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return _initialised; |
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} |
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void UARTDriver::set_blocking_writes(bool blocking) |
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{ |
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_nonblocking_writes = !blocking; |
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} |
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bool UARTDriver::tx_pending() { return false; } |
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/* Empty implementations of Stream virtual methods */ |
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uint32_t UARTDriver::available() { |
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if (!_initialised) { |
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return 0; |
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} |
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if (sdef.is_usb) { |
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#ifdef HAVE_USB_SERIAL |
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if (((SerialUSBDriver*)sdef.serial)->config->usbp->state != USB_ACTIVE) { |
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return 0; |
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} |
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#endif |
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} |
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return _readbuf.available(); |
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} |
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uint32_t UARTDriver::txspace() |
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{ |
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if (!_initialised) { |
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return 0; |
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} |
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return _writebuf.space(); |
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} |
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int16_t UARTDriver::read() |
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{ |
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if (_uart_owner_thd != chThdGetSelfX()){ |
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return -1; |
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} |
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if (!_initialised) { |
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return -1; |
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} |
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uint8_t byte; |
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if (!_readbuf.read_byte(&byte)) { |
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return -1; |
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} |
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if (!_rts_is_active) { |
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update_rts_line(); |
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} |
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return byte; |
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} |
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/* Empty implementations of Print virtual methods */ |
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size_t UARTDriver::write(uint8_t c) |
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{ |
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if (!chMtxTryLock(&_write_mutex)) { |
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return -1; |
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} |
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if (!_initialised) { |
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chMtxUnlock(&_write_mutex); |
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return 0; |
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} |
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while (_writebuf.space() == 0) { |
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if (_nonblocking_writes) { |
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chMtxUnlock(&_write_mutex); |
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return 0; |
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} |
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hal.scheduler->delay(1); |
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} |
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size_t ret = _writebuf.write(&c, 1); |
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chMtxUnlock(&_write_mutex); |
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return ret; |
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} |
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size_t UARTDriver::write(const uint8_t *buffer, size_t size) |
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{ |
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if (!_initialised) { |
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return 0; |
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} |
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if (!chMtxTryLock(&_write_mutex)) { |
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return -1; |
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} |
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if (!_nonblocking_writes) { |
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/* |
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use the per-byte delay loop in write() above for blocking writes |
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*/ |
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chMtxUnlock(&_write_mutex); |
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size_t ret = 0; |
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while (size--) { |
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if (write(*buffer++) != 1) break; |
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ret++; |
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} |
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return ret; |
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} |
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size_t ret = _writebuf.write(buffer, size); |
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chMtxUnlock(&_write_mutex); |
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return ret; |
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} |
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/* |
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wait for data to arrive, or a timeout. Return true if data has |
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arrived, false on timeout |
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*/ |
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bool UARTDriver::wait_timeout(uint16_t n, uint32_t timeout_ms) |
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{ |
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chEvtGetAndClearEvents(EVT_DATA); |
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if (available() >= n) { |
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return true; |
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} |
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_wait.n = n; |
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_wait.thread_ctx = chThdGetSelfX(); |
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eventmask_t mask = chEvtWaitAnyTimeout(EVT_DATA, MS2ST(timeout_ms)); |
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return (mask & EVT_DATA) != 0; |
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} |
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/* |
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push any pending bytes to/from the serial port. This is called at |
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1kHz in the timer thread. Doing it this way reduces the system call |
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overhead in the main task enormously. |
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*/ |
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void UARTDriver::_timer_tick(void) |
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{ |
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int ret; |
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uint32_t n; |
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if (!_initialised) return; |
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if (sdef.dma_rx && rxdma) { |
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_lock_rx_in_timer_tick = true; |
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//Check if DMA is enabled |
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//if not, it might be because the DMA interrupt was silenced |
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//let's handle that here so that we can continue receiving |
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if (!(rxdma->stream->CR & STM32_DMA_CR_EN)) { |
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uint8_t len = RX_BOUNCE_BUFSIZE - rxdma->stream->NDTR; |
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if (len != 0) { |
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_readbuf.write(rx_bounce_buf, len); |
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if (_wait.thread_ctx && _readbuf.available() >= _wait.n) { |
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chEvtSignal(_wait.thread_ctx, EVT_DATA); |
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} |
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if (_rts_is_active) { |
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update_rts_line(); |
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} |
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} |
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//DMA disabled by idle interrupt never got a chance to be handled |
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//we will enable it here |
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dmaStreamSetMemory0(rxdma, rx_bounce_buf); |
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dmaStreamSetTransactionSize(rxdma, RX_BOUNCE_BUFSIZE); |
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dmaStreamEnable(rxdma); |
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} |
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_lock_rx_in_timer_tick = false; |
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} |
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// don't try IO on a disconnected USB port |
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if (sdef.is_usb) { |
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#ifdef HAVE_USB_SERIAL |
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if (((SerialUSBDriver*)sdef.serial)->config->usbp->state != USB_ACTIVE) { |
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return; |
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} |
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#endif |
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} |
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if(sdef.is_usb) { |
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#ifdef HAVE_USB_SERIAL |
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((GPIO *)hal.gpio)->set_usb_connected(); |
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#endif |
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} |
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_in_timer = true; |
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|
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{ |
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// try to fill the read buffer |
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ByteBuffer::IoVec vec[2]; |
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|
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const auto n_vec = _readbuf.reserve(vec, _readbuf.space()); |
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for (int i = 0; i < n_vec; i++) { |
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//Do a non-blocking read |
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if (sdef.is_usb) { |
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ret = 0; |
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#ifdef HAVE_USB_SERIAL |
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ret = chnReadTimeout((SerialUSBDriver*)sdef.serial, vec[i].data, vec[i].len, TIME_IMMEDIATE); |
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#endif |
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} else if(!sdef.dma_rx){ |
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ret = 0; |
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ret = chnReadTimeout((SerialDriver*)sdef.serial, vec[i].data, vec[i].len, TIME_IMMEDIATE); |
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} else { |
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ret = 0; |
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} |
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if (ret < 0) { |
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break; |
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} |
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_readbuf.commit((unsigned)ret); |
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|
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/* stop reading as we read less than we asked for */ |
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if ((unsigned)ret < vec[i].len) { |
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break; |
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} |
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} |
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} |
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|
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// write any pending bytes |
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n = _writebuf.available(); |
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if (n > 0) { |
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if(!sdef.dma_tx) { |
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ByteBuffer::IoVec vec[2]; |
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const auto n_vec = _writebuf.peekiovec(vec, n); |
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for (int i = 0; i < n_vec; i++) { |
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if (sdef.is_usb) { |
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ret = 0; |
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#ifdef HAVE_USB_SERIAL |
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ret = chnWriteTimeout((SerialUSBDriver*)sdef.serial, vec[i].data, vec[i].len, TIME_IMMEDIATE); |
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#endif |
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} else { |
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ret = chnWriteTimeout((SerialDriver*)sdef.serial, vec[i].data, vec[i].len, TIME_IMMEDIATE); |
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} |
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if (ret < 0) { |
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break; |
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} |
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if (ret > 0) { |
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_last_write_completed_us = AP_HAL::micros(); |
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} |
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_writebuf.advance(ret); |
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|
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/* We wrote less than we asked for, stop */ |
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if ((unsigned)ret != vec[i].len) { |
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break; |
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} |
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} |
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} else { |
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if(tx_bounce_buf_ready) { |
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/* TX DMA channel preparation.*/ |
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_writebuf.advance(tx_len); |
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tx_len = _writebuf.peekbytes(tx_bounce_buf, TX_BOUNCE_BUFSIZE); |
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if (tx_len == 0) { |
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goto end; |
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} |
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dma_handle->lock(); |
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tx_bounce_buf_ready = false; |
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osalDbgAssert(txdma != nullptr, "UART TX DMA allocation failed"); |
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dmaStreamSetMemory0(txdma, tx_bounce_buf); |
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dmaStreamSetTransactionSize(txdma, tx_len); |
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uint32_t dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
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dmamode |= STM32_DMA_CR_CHSEL(STM32_DMA_GETCHANNEL(sdef.dma_tx_stream_id, |
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sdef.dma_tx_channel_id)); |
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dmamode |= STM32_DMA_CR_PL(0); |
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dmaStreamSetMode(txdma, dmamode | STM32_DMA_CR_DIR_M2P | |
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STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE); |
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dmaStreamEnable(txdma); |
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} else if (sdef.dma_tx && txdma) { |
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if (!(txdma->stream->CR & STM32_DMA_CR_EN)) { |
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if (txdma->stream->NDTR == 0) { |
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tx_bounce_buf_ready = true; |
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_last_write_completed_us = AP_HAL::micros(); |
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dma_handle->unlock(); |
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} |
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} |
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} |
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} |
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|
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// handle AUTO flow control mode |
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if (_flow_control == FLOW_CONTROL_AUTO) { |
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if (_first_write_started_us == 0) { |
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_first_write_started_us = AP_HAL::micros(); |
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} |
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if (_last_write_completed_us != 0) { |
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_flow_control = FLOW_CONTROL_ENABLE; |
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} else if (AP_HAL::micros() - _first_write_started_us > 500*1000UL) { |
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// it doesn't look like hw flow control is working |
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hal.console->printf("disabling flow control on serial %u\n", sdef.get_index()); |
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set_flow_control(FLOW_CONTROL_DISABLE); |
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} |
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} |
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} |
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end: |
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_in_timer = false; |
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} |
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|
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/* |
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change flow control mode for port |
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*/ |
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void UARTDriver::set_flow_control(enum flow_control flow_control) |
|
{ |
|
if (sdef.rts_line == 0 || sdef.is_usb) { |
|
// no hw flow control available |
|
return; |
|
} |
|
|
|
_flow_control = flow_control; |
|
if (!_initialised) { |
|
// not ready yet, we just set variable for when we call begin |
|
return; |
|
} |
|
switch (_flow_control) { |
|
|
|
case FLOW_CONTROL_DISABLE: |
|
// force RTS active when flow disabled |
|
palSetLineMode(sdef.rts_line, 1); |
|
palClearLine(sdef.rts_line); |
|
_rts_is_active = true; |
|
// disable hardware CTS support |
|
((SerialDriver*)(sdef.serial))->usart->CR3 &= ~USART_CR3_CTSE; |
|
break; |
|
|
|
case FLOW_CONTROL_AUTO: |
|
// reset flow control auto state machine |
|
_first_write_started_us = 0; |
|
_last_write_completed_us = 0; |
|
FALLTHROUGH; |
|
|
|
case FLOW_CONTROL_ENABLE: |
|
// we do RTS in software as STM32 hardware RTS support toggles |
|
// the pin for every byte which loses a lot of bandwidth |
|
palSetLineMode(sdef.rts_line, 1); |
|
palClearLine(sdef.rts_line); |
|
_rts_is_active = true; |
|
// enable hardware CTS support |
|
((SerialDriver*)(sdef.serial))->usart->CR3 |= USART_CR3_CTSE; |
|
break; |
|
} |
|
} |
|
|
|
/* |
|
software update of rts line. We don't use the HW support for RTS as |
|
it has no hysteresis, so it ends up toggling RTS on every byte |
|
*/ |
|
void UARTDriver::update_rts_line(void) |
|
{ |
|
if (sdef.rts_line == 0 || _flow_control == FLOW_CONTROL_DISABLE) { |
|
return; |
|
} |
|
uint16_t space = _readbuf.space(); |
|
if (_rts_is_active && space < 16) { |
|
_rts_is_active = false; |
|
palSetLine(sdef.rts_line); |
|
} else if (!_rts_is_active && space > 32) { |
|
_rts_is_active = true; |
|
palClearLine(sdef.rts_line); |
|
} |
|
} |
|
|
|
#endif //CONFIG_HAL_BOARD == HAL_BOARD_CHIBIOS
|
|
|