Browse Source
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4612 7fd9a85b-ad96-42d3-883c-3090e2eb8679sbg
patacongo
13 years ago
7 changed files with 679 additions and 41 deletions
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|
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/****************************************************************************
|
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* arch/arm/src/stm32/stm32_iwdg.c |
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* |
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* Copyright (C) 2012 Gregory Nutt. All rights reserved. |
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* Author: Gregory Nutt <gnutt@nuttx.org> |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* 3. Neither the name NuttX nor the names of its contributors may be |
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* used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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* |
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****************************************************************************/ |
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|
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/****************************************************************************
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* Included Files |
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****************************************************************************/ |
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#include <nuttx/config.h> |
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#include <nuttx/arch.h> |
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#include <stdint.h> |
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#include <errno.h> |
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#include <nuttx/watchdog.h> |
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#include "up_arch.h" |
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#include "stm32_rcc.h" |
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#include "stm32_wdg.h" |
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#if defined(CONFIG_WATCHDOG) && defined(CONFIG_STM32_IWDG) |
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/****************************************************************************
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* Pre-Processor Definitions |
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****************************************************************************/ |
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/* Configuration ************************************************************/ |
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#ifndef CONFIG_STM32_IWDG_DEFTIMOUT |
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# define CONFIG_STM32_IWDG_DEFTIMOUT 3000 /* Three seconds */ |
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#endif |
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/****************************************************************************
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* Private Types |
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****************************************************************************/ |
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/* This structure provides the private representation of the "lower-half"
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* driver state structure. This structure must be cast-compatible with the |
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* well-known watchdog_lowerhalf_s structure. |
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*/ |
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struct stm32_lowerhalf_s |
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{ |
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FAR const struct watchdog_ops_s *ops; /* Lower half operations */ |
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uint32_t lsifreq; /* The calibrated frequency of the LSI oscillator */ |
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uint32_t timeout; /* The (actual) selected timeout */ |
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bool started; /* true: The watchdog timer has been started */ |
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uint8_t prescaler; /* Clock prescaler value */ |
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uint16_t reload; /* Timer reload value */ |
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}; |
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/****************************************************************************
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* Private Function Prototypes |
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****************************************************************************/ |
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/* Register operations ******************************************************/ |
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#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG) |
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static uint32_t stm32_getreg(uint32_t addr); |
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static void stm32_putreg(uint32_t val, uint32_t addr); |
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#else |
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# define stm32_getreg(addr) getreg16(addr) |
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# define stm32_putreg(val,addr) putreg16(val,addr) |
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#endif |
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/* "Lower half" driver methods **********************************************/ |
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static int stm32_start(FAR struct watchdog_lowerhalf_s *lower); |
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static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower); |
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static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower); |
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static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower, |
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FAR struct watchdog_status_s *status); |
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static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, |
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uint32_t timeout); |
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/****************************************************************************
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* Private Data |
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****************************************************************************/ |
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/* "Lower half" driver methods */ |
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static const struct watchdog_ops_s g_wdgops = |
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{ |
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.start = stm32_start, |
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.stop = stm32_stop, |
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.keepalive = stm32_keepalive, |
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.getstatus = stm32_getstatus, |
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.settimeout = stm32_settimeout, |
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.capture = NULL, |
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.ioctl = NULL, |
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}; |
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/* "Lower half" driver state */ |
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static struct stm32_lowerhalf_s g_wdgdev; |
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/****************************************************************************
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* Private Functions |
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****************************************************************************/ |
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/****************************************************************************
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* Name: stm32_getreg |
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* |
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* Description: |
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* Get the contents of an STM32 IWDG register |
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* |
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****************************************************************************/ |
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#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG) |
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static uint16_t stm32_getreg(uint32_t addr) |
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{ |
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static uint32_t prevaddr = 0; |
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static uint32_t count = 0; |
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static uint16_t preval = 0; |
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/* Read the value from the register */ |
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uint16_t val = getreg16(addr); |
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/* Is this the same value that we read from the same registe last time? Are
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* we polling the register? If so, suppress some of the output. |
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*/ |
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if (addr == prevaddr && val == preval) |
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{ |
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if (count == 0xffffffff || ++count > 3) |
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{ |
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if (count == 4) |
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{ |
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lldbg("...\n"); |
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} |
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return val; |
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} |
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} |
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/* No this is a new address or value */ |
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else |
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{ |
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/* Did we print "..." for the previous value? */ |
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if (count > 3) |
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{ |
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/* Yes.. then show how many times the value repeated */ |
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lldbg("[repeats %d more times]\n", count-3); |
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} |
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/* Save the new address, value, and count */ |
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prevaddr = addr; |
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preval = val; |
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count = 1; |
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} |
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/* Show the register value read */ |
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lldbg("%08x->%04x\n", addr, val); |
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return val; |
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} |
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#endif |
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/****************************************************************************
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* Name: stm32_putreg |
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* |
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* Description: |
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* Set the contents of an STM32 register to a value |
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* |
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****************************************************************************/ |
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#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG) |
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static void stm32_putreg(uint16_t val, uint32_t addr) |
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{ |
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/* Show the register value being written */ |
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lldbg("%08x<-%04x\n", addr, val); |
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/* Write the value */ |
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putreg16(val, addr); |
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} |
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#endif |
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/****************************************************************************
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* Name: stm32_start |
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* |
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* Description: |
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* Start the watchdog timer, resetting the time to the current timeout, |
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* |
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* Input Parameters: |
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* lower - A pointer the publicly visible representation of the "lower |
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* driver state structure. |
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* |
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* Returned Values: |
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* Zero on success; a negated errno value on failure. |
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* |
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****************************************************************************/ |
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static int stm32_start(FAR struct watchdog_lowerhalf_s *lower) |
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{ |
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; |
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DEBUGASSERT(priv); |
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/* Reload IWDG counter */ |
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stm32_putreg(IWDG_KR_KEY_RELOAD, STM32_IWDG_KR); |
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/* Enable IWDG (the LSI oscillator will be enabled by hardware). NOTE:
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* If the "Hardware watchdog" feature is enabled through the device option |
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* bits, the watchdog is automatically enabled at power-on. |
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*/ |
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stm32_putreg(IWDG_KR_KEY_START, STM32_IWDG_KR); |
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priv->started = true; |
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return OK; |
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} |
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/****************************************************************************
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* Name: stm32_stop |
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* |
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* Description: |
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* Stop the watchdog timer |
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* |
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* Input Parameters: |
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* lower - A pointer the publicly visible representation of the "lower |
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* driver state structure. |
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* |
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* Returned Values: |
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* Zero on success; a negated errno value on failure. |
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* |
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****************************************************************************/ |
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static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower) |
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{ |
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/* There is no way to disable the IDWG timer once it has been started */ |
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return -ENOSYS; |
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} |
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/****************************************************************************
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* Name: stm32_keepalive |
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* |
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* Description: |
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* Reset the watchdog timer to the current timeout value, prevent any |
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* imminent watchdog timeouts. This is sometimes referred as "pinging" |
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* the atchdog timer or "petting the dog". |
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* |
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* Input Parameters: |
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* lower - A pointer the publicly visible representation of the "lower |
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* driver state structure. |
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* |
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* Returned Values: |
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* Zero on success; a negated errno value on failure. |
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* |
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****************************************************************************/ |
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static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower) |
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{ |
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/* Reload the IWDG timer */ |
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stm32_putreg(IWDG_KR_KEY_RELOAD, STM32_IWDG_KR); |
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return OK; |
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} |
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|
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/****************************************************************************
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* Name: stm32_getstatus |
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* |
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* Description: |
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* Get the current watchdog timer status |
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* |
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* Input Parameters: |
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* lower - A pointer the publicly visible representation of the "lower |
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* driver state structure. |
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* stawtus - The location to return the watchdog status information. |
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* |
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* Returned Values: |
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* Zero on success; a negated errno value on failure. |
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* |
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****************************************************************************/ |
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static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower, |
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FAR struct watchdog_status_s *status) |
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{ |
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; |
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uint32_t elapsed; |
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uint16_t reload; |
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DEBUGASSERT(priv); |
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status->flags = WDFLAGS_RESET; |
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if (priv->started) |
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{ |
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status->flags |= WDFLAGS_ACTIVE; |
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} |
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status->timeout = priv->timeout; |
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/* I am not sure what will be returned when reading from the reload register.
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* Documentation says that the value from the VDD section should be read |
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* so presume it the decremented value. |
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*/ |
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reload = stm32_getreg(STM32_IWDG_RLR); |
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elapsed = priv->reload - reload; |
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status->timeleft = (priv->timeout * elapsed) / priv->reload; |
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return OK; |
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} |
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|
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/****************************************************************************
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* Name: stm32_settimeout |
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* |
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* Description: |
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* Set a new timeout value (and reset the watchdog timer) |
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* |
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* Input Parameters: |
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* lower - A pointer the publicly visible representation of the "lower |
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* driver state structure. |
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* timeout - The new timeout value in millisecnds. |
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* |
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* Returned Values: |
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* Zero on success; a negated errno value on failure. |
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* |
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****************************************************************************/ |
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static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, |
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uint32_t timeout) |
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{ |
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; |
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uint32_t frequency; |
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uint64_t reload; |
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int pr; |
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int shift; |
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DEBUGASSERT(priv); |
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/* Select the smallest prescaler that will result in a reload value that is
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* less than the maximum. |
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*/ |
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for (pr = 0; ; pr++) |
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{ |
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/* PR = 0 -> Divider = 4 = 1 << 2
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* PR = 1 -> Divider = 8 = 1 << 3 |
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* PR = 2 -> Divider = 16 = 1 << 4 |
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* PR = 3 -> Divider = 32 = 1 << 5 |
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* PR = 4 -> Divider = 64 = 1 << 6 |
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* PR = 5 -> Divider = 128 = 1 << 7 |
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* PR = 6 -> Divider = 256 = 1 << 8 |
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*/ |
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shift = pr + 2; |
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/* Is the IWDG counter frequency in Hz. For a nominal 32Khz LSI clock,
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* this is value in the range of 7500 and 125. |
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*/ |
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frequency = priv->lsifreq >> shift; |
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/* We want:
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* 1000 * reload / frequency = timeout |
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* Or: |
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* reload = frequency * timeout / 1000 |
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*/ |
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reload = (uint64_t)frequency * (uint64_t)timeout / 1000; |
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/* If this reload valid is less than the maximum or we are not ready
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* at the prescaler value, then break out of the loop to use these |
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* settings. |
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*/ |
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if (reload <= IWDG_RLR_MAX || pr == 6) |
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{ |
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/* Note that we explicity break out of the loop rather than using
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* the 'for' loop termination logic because we do not want the |
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* value of pr to be incremented. |
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*/ |
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break; |
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} |
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} |
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/* Make sure that the final reload value is within range */ |
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if (reload > IWDG_RLR_MAX) |
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{ |
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reload = IWDG_RLR_MAX; |
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} |
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/* Enable write access to IWDG_PR and IWDG_RLR registers */ |
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stm32_putreg(IWDG_KR_KEY_ENABLE, STM32_IWDG_KR); |
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/* Set the prescaler */ |
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stm32_putreg((uint16_t)pr << IWDG_PR_SHIFT, STM32_IWDG_PR); |
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/* Set the reload value */ |
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stm32_putreg((uint16_t)reload, STM32_IWDG_RLR); |
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/* Get the actual timeout value in milliseconds.
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* |
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* We have: |
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* reload = frequency * timeout / 1000 |
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* So we want: |
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* timeout = 1000 * reload / frequency |
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*/ |
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priv->timeout = (1000 * reload) / frequency; |
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/* Save setup values for later use */ |
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priv->prescaler = pr; /* Not needed */ |
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priv->reload = reload; |
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return OK; |
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} |
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/****************************************************************************
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* Public Functions |
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****************************************************************************/ |
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/****************************************************************************
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* Name: stm32_iwdginitialize |
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* |
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* Description: |
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* Initialize the IWDG watchdog time. The watchdog timer is intialized and |
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* registers as 'devpath. The initial state of the watchdog time is |
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* disabled. |
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* |
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* Input Parameters: |
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* devpath - The full path to the watchdog. This should be of the form |
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* /dev/watchdog0 |
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* lsifreq - The calibrated LSI clock frequency |
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* |
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* Returned Values: |
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* None |
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* |
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****************************************************************************/ |
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void stm32_iwdginitialize(FAR const char *devpath, uint32_t lsifreq) |
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{ |
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FAR struct stm32_lowerhalf_s *priv = &g_wdgdev; |
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/* Initialize the driver state structure. */ |
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priv->ops = &g_wdgops; |
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priv->lsifreq = lsifreq; |
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priv->lsifreq = false; |
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/* Make sure that the LSI ocsillator is enabled. NOTE: The LSI oscillator
|
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* is enabled here but is not disabled by this file (because this file does |
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* not know the the global usage of the oscillator. Any clock management |
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* logic (say, as part of a power management scheme) needs handle other |
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* LSI controls outside of this file. |
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*/ |
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stm32_rcc_enablelsi(); |
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|
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/* Select an arbitrary initial timeout value. But don't start the watchdog
|
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* yet. NOTE: If the "Hardware watchdog" feature is enabled through the |
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* device option bits, the watchdog is automatically enabled at power-on. |
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*/ |
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|
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stm32_settimeout((FAR struct watchdog_lowerhalf_s *)priv, CONFIG_STM32_IWDG_DEFTIMOUT); |
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/* Register the watchdog driver as /dev/watchdog0 */ |
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(void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv); |
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} |
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#endif /* CONFIG_WATCHDOG && CONFIG_STM32_IWDG */ |
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@ -0,0 +1,94 @@
@@ -0,0 +1,94 @@
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/****************************************************************************
|
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* arch/arm/src/stm32/stm32_lsi.c |
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* |
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* Copyright (C) 2012 Gregory Nutt. All rights reserved. |
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* Author: Gregory Nutt <gnutt@nuttx.orgr> |
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* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* |
||||
* 1. Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* 3. Neither the name NuttX nor the names of its contributors may be |
||||
* used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************/ |
||||
|
||||
/****************************************************************************
|
||||
* Included Files |
||||
****************************************************************************/ |
||||
|
||||
#include <nuttx/config.h> |
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|
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#include "up_arch.h" |
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|
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#include "stm32_rcc.h" |
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|
||||
/****************************************************************************
|
||||
* Definitions |
||||
****************************************************************************/ |
||||
|
||||
/****************************************************************************
|
||||
* Private Data |
||||
****************************************************************************/ |
||||
|
||||
/****************************************************************************
|
||||
* Private Functions |
||||
****************************************************************************/ |
||||
|
||||
/****************************************************************************
|
||||
* Public Functions |
||||
****************************************************************************/ |
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_rcc_enablelsi |
||||
* |
||||
* Description: |
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* Enable the Internal Low-Speed (LSI) RC Oscillator. |
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* |
||||
****************************************************************************/ |
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|
||||
void stm32_rcc_enablelsi(void) |
||||
{ |
||||
/* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION bit
|
||||
* the RCC CSR register. |
||||
*/ |
||||
|
||||
modifyreg16(STM32_RCC_CSR, 0, RCC_CSR_LSION); |
||||
} |
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_rcc_disablelsi |
||||
* |
||||
* Description: |
||||
* Disable the Internal Low-Speed (LSI) RC Oscillator. |
||||
* |
||||
****************************************************************************/ |
||||
|
||||
void stm32_rcc_disablelsi(void) |
||||
{ |
||||
/* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION bit
|
||||
* the RCC CSR register. |
||||
*/ |
||||
|
||||
modifyreg16(STM32_RCC_CSR, RCC_CSR_LSION, 0); |
||||
} |
||||
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Reference in new issue