From 18c23f126b3ea4bea5a9535401e6a7840204cc9b Mon Sep 17 00:00:00 2001 From: patacongo Date: Sat, 26 May 2012 01:45:37 +0000 Subject: [PATCH] Now have to press enter 3 times to start with USB NSH console git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4772 7fd9a85b-ad96-42d3-883c-3090e2eb8679 --- apps/ChangeLog.txt | 3 ++ apps/nshlib/nsh_usbdev.c | 48 ++++++++++++++++++--- nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h | 16 +++---- nuttx/arch/arm/src/stm32/stm32_otgfsdev.c | 12 ++++-- 4 files changed, 60 insertions(+), 19 deletions(-) diff --git a/apps/ChangeLog.txt b/apps/ChangeLog.txt index 825b1e50f3..acdd387af5 100755 --- a/apps/ChangeLog.txt +++ b/apps/ChangeLog.txt @@ -234,3 +234,6 @@ * apps/nshlib/nsh_usbdev.c: Add the capability to use an arbitrary USB device as the console (not necessarily /dev/console). This is a useful option because then you can still use the serial console to debug with. + * apps/nshlib/nsh_usbdev.c: User now has to press ENTER 3 times before + USB console will start. Otherwise, the USB console starts before there + is anyone at the other end to listen. diff --git a/apps/nshlib/nsh_usbdev.c b/apps/nshlib/nsh_usbdev.c index 2b31a1a141..87689d5a2c 100644 --- a/apps/nshlib/nsh_usbdev.c +++ b/apps/nshlib/nsh_usbdev.c @@ -92,6 +92,9 @@ #ifdef HAVE_USB_CONSOLE int nsh_usbconsole(void) { + char inch; + ssize_t nbytes; + int nlc; int fd; int ret; @@ -116,13 +119,7 @@ int nsh_usbconsole(void) DEBUGASSERT(ret == OK); #endif - /* Make sure the stdin, stdout, and stderr are closed */ - - (void)fclose(stdin); - (void)fclose(stdout); - (void)fclose(stderr); - - /* Open the USB serial device for writing */ + /* Open the USB serial device for read/write access */ do { @@ -146,6 +143,43 @@ int nsh_usbconsole(void) } while (fd < 0); + /* Now waiting until we successfully read a carriage return a few times. + * That is a sure way of know that there is something at the other end of + * the USB serial connection that is ready to talk with us. The user needs + * to hit ENTER a few times to get things started. + */ + + nlc = 0; + do + { + /* Read one byte */ + + inch = 0; + nbytes = read(fd, &inch, 1); + + /* Is it a carriage return (or maybe a newline)? */ + + if (nbytes == 1 && (inch == '\n' || inch == '\r')) + { + /* Yes.. increment the count */ + + nlc++; + } + else + { + /* No.. Reset the count. We need to see 3 in a row to continue. */ + + nlc = 0; + } + } + while (nlc < 3); + + /* Make sure the stdin, stdout, and stderr are closed */ + + (void)fclose(stdin); + (void)fclose(stdout); + (void)fclose(stderr); + /* Dup the fd to create standard fd 0-2 */ (void)dup2(fd, 0); diff --git a/nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h b/nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h index 57799b6b6b..d3bf7eb547 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h @@ -198,17 +198,17 @@ #define STM32_OTGFS_DFIFO_DEP_OFFSET(n) (0x1000 + ((n) << 12)) #define STM32_OTGFS_DFIFO_HCH_OFFSET(n) (0x1000 + ((n) << 12)) -#define STM32_OTGFS_DFIFO_DEP0_OFFSET 0x1000 /* 0x1000–0x1ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH0_OFFSET 0x1000 /* 0x1000–0x1ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */ +#define STM32_OTGFS_DFIFO_DEP0_OFFSET 0x1000 /* 0x1000-0x1ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */ +#define STM32_OTGFS_DFIFO_HCH0_OFFSET 0x1000 /* 0x1000-0x1ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */ -#define STM32_OTGFS_DFIFO_DEP1_OFFSET 0x2000 /* 0x2000–0x2ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH1_OFFSET 0x2000 /* 0x2000–0x2ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */ +#define STM32_OTGFS_DFIFO_DEP1_OFFSET 0x2000 /* 0x2000-0x2ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */ +#define STM32_OTGFS_DFIFO_HCH1_OFFSET 0x2000 /* 0x2000-0x2ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */ -#define STM32_OTGFS_DFIFO_DEP2_OFFSET 0x3000 /* 0x3000–0x3ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH2_OFFSET 0x3000 /* 0x3000–0x3ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */ +#define STM32_OTGFS_DFIFO_DEP2_OFFSET 0x3000 /* 0x3000-0x3ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */ +#define STM32_OTGFS_DFIFO_HCH2_OFFSET 0x3000 /* 0x3000-0x3ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */ -#define STM32_OTGFS_DFIFO_DEP3_OFFSET 0x4000 /* 0x4000–0x4ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH3_OFFSET 0x4000 /* 0x4000–0x4ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */ +#define STM32_OTGFS_DFIFO_DEP3_OFFSET 0x4000 /* 0x4000-0x4ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */ +#define STM32_OTGFS_DFIFO_HCH3_OFFSET 0x4000 /* 0x4000-0x4ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */ /* Power and clock gating registers */ diff --git a/nuttx/arch/arm/src/stm32/stm32_otgfsdev.c b/nuttx/arch/arm/src/stm32/stm32_otgfsdev.c index e36f4e33b5..d07d06c791 100755 --- a/nuttx/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/nuttx/arch/arm/src/stm32/stm32_otgfsdev.c @@ -1263,9 +1263,11 @@ static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep, uint32_t regaddr; int i; - /* Get the address of the endpoint FIFO. Note: there is only one RxFIFO. */ + /* Get the address of the RxFIFO. Note: there is only one RxFIFO so + * we might as well use the addess associated with EP0. + */ - regaddr = STM32_OTGFS_DFIFO_DEP(privep->epphy); + regaddr = STM32_OTGFS_DFIFO_DEP(EP0); /* Read 32-bits and write 4 x 8-bits at time (to avoid unaligned accesses) */ @@ -1305,9 +1307,11 @@ static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len) uint32_t regaddr; int i; - /* Get the address of the endpoint FIFO */ + /* Get the address of the RxFIFO Note: there is only one RxFIFO so + * we might as well use the addess associated with EP0. + */ - regaddr = STM32_OTGFS_DFIFO_DEP(privep->epphy); + regaddr = STM32_OTGFS_DFIFO_DEP(EP0); /* Read 32-bits at time */