David Sidrane
3 years ago
committed by
Daniel Agar
34 changed files with 3485 additions and 1 deletions
@ -0,0 +1,3 @@ |
|||||||
|
CONFIG_BOARD_TOOLCHAIN="arm-none-eabi" |
||||||
|
CONFIG_BOARD_ARCHITECTURE="cortex-m7" |
||||||
|
CONFIG_BOARD_ROMFSROOT="" |
||||||
@ -0,0 +1,91 @@ |
|||||||
|
CONFIG_BOARD_TOOLCHAIN="arm-none-eabi" |
||||||
|
CONFIG_BOARD_ARCHITECTURE="cortex-m7" |
||||||
|
CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS0" |
||||||
|
CONFIG_BOARD_SERIAL_GPS2="/dev/ttyS6" |
||||||
|
CONFIG_BOARD_SERIAL_TEL1="/dev/ttyS5" |
||||||
|
CONFIG_BOARD_SERIAL_TEL2="/dev/ttyS3" |
||||||
|
CONFIG_BOARD_SERIAL_TEL3="/dev/ttyS1" |
||||||
|
CONFIG_DRIVERS_ADC_BOARD_ADC=y |
||||||
|
CONFIG_COMMON_BAROMETERS=y |
||||||
|
CONFIG_DRIVERS_BATT_SMBUS=y |
||||||
|
CONFIG_DRIVERS_CAMERA_CAPTURE=y |
||||||
|
CONFIG_DRIVERS_CAMERA_TRIGGER=y |
||||||
|
CONFIG_COMMON_DIFFERENTIAL_PRESSURE=y |
||||||
|
CONFIG_COMMON_DISTANCE_SENSOR=y |
||||||
|
CONFIG_DRIVERS_DSHOT=y |
||||||
|
CONFIG_DRIVERS_GPS=y |
||||||
|
CONFIG_DRIVERS_HEATER=y |
||||||
|
CONFIG_DRIVERS_IMU_BOSCH_BMI055=y |
||||||
|
CONFIG_DRIVERS_IMU_INVENSENSE_ICM42688P=y |
||||||
|
CONFIG_COMMON_LIGHT=y |
||||||
|
CONFIG_COMMON_MAGNETOMETER=y |
||||||
|
CONFIG_COMMON_OPTICAL_FLOW=y |
||||||
|
CONFIG_DRIVERS_POWER_MONITOR_INA226=y |
||||||
|
CONFIG_DRIVERS_POWER_MONITOR_INA228=y |
||||||
|
CONFIG_DRIVERS_POWER_MONITOR_INA238=y |
||||||
|
CONFIG_DRIVERS_PWM_OUT=y |
||||||
|
CONFIG_DRIVERS_PWM_OUT_SIM=y |
||||||
|
CONFIG_DRIVERS_PX4IO=y |
||||||
|
CONFIG_COMMON_TELEMETRY=y |
||||||
|
CONFIG_DRIVERS_TONE_ALARM=y |
||||||
|
CONFIG_DRIVERS_UAVCAN=y |
||||||
|
CONFIG_BOARD_UAVCAN_TIMER_OVERRIDE=2 |
||||||
|
CONFIG_MODULES_AIRSPEED_SELECTOR=y |
||||||
|
CONFIG_MODULES_BATTERY_STATUS=y |
||||||
|
CONFIG_MODULES_CAMERA_FEEDBACK=y |
||||||
|
CONFIG_MODULES_COMMANDER=y |
||||||
|
CONFIG_MODULES_CONTROL_ALLOCATOR=y |
||||||
|
CONFIG_MODULES_DATAMAN=y |
||||||
|
CONFIG_MODULES_EKF2=y |
||||||
|
CONFIG_MODULES_ESC_BATTERY=y |
||||||
|
CONFIG_MODULES_EVENTS=y |
||||||
|
CONFIG_MODULES_FLIGHT_MODE_MANAGER=y |
||||||
|
CONFIG_MODULES_FW_ATT_CONTROL=y |
||||||
|
CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y |
||||||
|
CONFIG_MODULES_FW_POS_CONTROL_L1=y |
||||||
|
CONFIG_MODULES_GIMBAL=y |
||||||
|
CONFIG_MODULES_GYRO_CALIBRATION=y |
||||||
|
CONFIG_MODULES_GYRO_FFT=y |
||||||
|
CONFIG_MODULES_LAND_DETECTOR=y |
||||||
|
CONFIG_MODULES_LANDING_TARGET_ESTIMATOR=y |
||||||
|
CONFIG_MODULES_LOAD_MON=y |
||||||
|
CONFIG_MODULES_LOGGER=y |
||||||
|
CONFIG_MODULES_MAG_BIAS_ESTIMATOR=y |
||||||
|
CONFIG_MODULES_MANUAL_CONTROL=y |
||||||
|
CONFIG_MODULES_MAVLINK=y |
||||||
|
CONFIG_MODULES_MC_ATT_CONTROL=y |
||||||
|
CONFIG_MODULES_MC_AUTOTUNE_ATTITUDE_CONTROL=y |
||||||
|
CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=y |
||||||
|
CONFIG_MODULES_MC_POS_CONTROL=y |
||||||
|
CONFIG_MODULES_MC_RATE_CONTROL=y |
||||||
|
CONFIG_MODULES_NAVIGATOR=y |
||||||
|
CONFIG_MODULES_RC_UPDATE=y |
||||||
|
CONFIG_MODULES_ROVER_POS_CONTROL=y |
||||||
|
CONFIG_MODULES_SENSORS=y |
||||||
|
CONFIG_MODULES_SIH=y |
||||||
|
CONFIG_MODULES_TEMPERATURE_COMPENSATION=y |
||||||
|
CONFIG_MODULES_VTOL_ATT_CONTROL=y |
||||||
|
CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y |
||||||
|
CONFIG_SYSTEMCMDS_BL_UPDATE=y |
||||||
|
CONFIG_SYSTEMCMDS_DMESG=y |
||||||
|
CONFIG_SYSTEMCMDS_HARDFAULT_LOG=y |
||||||
|
CONFIG_SYSTEMCMDS_I2CDETECT=y |
||||||
|
CONFIG_SYSTEMCMDS_LED_CONTROL=y |
||||||
|
CONFIG_SYSTEMCMDS_MFT=y |
||||||
|
CONFIG_SYSTEMCMDS_MIXER=y |
||||||
|
CONFIG_SYSTEMCMDS_MOTOR_TEST=y |
||||||
|
CONFIG_SYSTEMCMDS_MTD=y |
||||||
|
CONFIG_SYSTEMCMDS_NSHTERM=y |
||||||
|
CONFIG_SYSTEMCMDS_PARAM=y |
||||||
|
CONFIG_SYSTEMCMDS_PERF=y |
||||||
|
CONFIG_SYSTEMCMDS_PWM=y |
||||||
|
CONFIG_SYSTEMCMDS_REBOOT=y |
||||||
|
CONFIG_SYSTEMCMDS_SD_BENCH=y |
||||||
|
CONFIG_SYSTEMCMDS_SERIAL_TEST=y |
||||||
|
CONFIG_SYSTEMCMDS_SYSTEM_TIME=y |
||||||
|
CONFIG_SYSTEMCMDS_TOP=y |
||||||
|
CONFIG_SYSTEMCMDS_TOPIC_LISTENER=y |
||||||
|
CONFIG_SYSTEMCMDS_TUNE_CONTROL=y |
||||||
|
CONFIG_SYSTEMCMDS_UORB=y |
||||||
|
CONFIG_SYSTEMCMDS_VER=y |
||||||
|
CONFIG_SYSTEMCMDS_WORK_QUEUE=y |
||||||
Binary file not shown.
Binary file not shown.
@ -0,0 +1,13 @@ |
|||||||
|
{ |
||||||
|
"board_id": 56, |
||||||
|
"magic": "PX4FWv1", |
||||||
|
"description": "Firmware for the PX4FMUv6C board", |
||||||
|
"image": "", |
||||||
|
"build_time": 0, |
||||||
|
"summary": "PX4FMUv6C", |
||||||
|
"version": "0.1", |
||||||
|
"image_size": 0, |
||||||
|
"image_maxsize": 1966080, |
||||||
|
"git_identity": "", |
||||||
|
"board_revision": 0 |
||||||
|
} |
||||||
@ -0,0 +1,20 @@ |
|||||||
|
#!/bin/sh |
||||||
|
# |
||||||
|
# board specific defaults |
||||||
|
#------------------------------------------------------------------------------ |
||||||
|
|
||||||
|
|
||||||
|
param set-default BAT1_V_DIV 18.1 |
||||||
|
param set-default BAT2_V_DIV 18.1 |
||||||
|
|
||||||
|
param set-default BAT1_A_PER_V 36.367515152 |
||||||
|
param set-default BAT2_A_PER_V 36.367515152 |
||||||
|
|
||||||
|
# Mavlink ethernet (CFG 1000) |
||||||
|
param set-default MAV_2_CONFIG 1000 |
||||||
|
param set-default MAV_2_BROADCAST 1 |
||||||
|
param set-default MAV_2_MODE 0 |
||||||
|
param set-default MAV_2_RADIO_CTL 0 |
||||||
|
param set-default MAV_2_RATE 100000 |
||||||
|
param set-default MAV_2_REMOTE_PRT 14550 |
||||||
|
param set-default MAV_2_UDP_PRT 14550 |
||||||
@ -0,0 +1,21 @@ |
|||||||
|
#!/bin/sh |
||||||
|
# |
||||||
|
# PX4 FMUv6C specific board sensors init |
||||||
|
#------------------------------------------------------------------------------ |
||||||
|
board_adc start |
||||||
|
|
||||||
|
# Internal SPI bus BMI055 accel/gyro |
||||||
|
bmi055 -A -R 4 -s start |
||||||
|
bmi055 -G -R 4 -s start |
||||||
|
|
||||||
|
# Internal SPI bus ICM42688p |
||||||
|
icm42688p -R 6 -s start |
||||||
|
|
||||||
|
# Internal barometer on I2C4 |
||||||
|
ms5611 -I -b 4 -a 0x77 start |
||||||
|
|
||||||
|
# Internal compass on IMU I2C4 |
||||||
|
ist8310 -I -b 4 -a 0xc -R 6 start |
||||||
|
|
||||||
|
# External compass on GPS/I2C1 (the 3rd external bus): standard Holybro Pixhawk 4 or CUAV V5 GPS/compass puck (with lights, safety button, and buzzer) |
||||||
|
ist8310 -X -b 1 -R 10 start |
||||||
@ -0,0 +1,17 @@ |
|||||||
|
# |
||||||
|
# For a description of the syntax of this configuration file, |
||||||
|
# see misc/tools/kconfig-language.txt. |
||||||
|
# |
||||||
|
config BOARD_HAS_PROBES |
||||||
|
bool "Board provides GPIO or other Hardware for signaling to timing analyze." |
||||||
|
default y |
||||||
|
---help--- |
||||||
|
This board provides GPIO FMU-CH1-5, CAP1-6 as PROBE_1-11 to provide timing signals from selected drivers. |
||||||
|
|
||||||
|
config BOARD_USE_PROBES |
||||||
|
bool "Enable the use the board provided FMU-CH1-5, CAP1-6 as PROBE_1-11" |
||||||
|
default n |
||||||
|
depends on BOARD_HAS_PROBES |
||||||
|
|
||||||
|
---help--- |
||||||
|
Select to use GPIO FMU-CH1-5, CAP1-6 to provide timing signals from selected drivers. |
||||||
@ -0,0 +1,96 @@ |
|||||||
|
# |
||||||
|
# This file is autogenerated: PLEASE DO NOT EDIT IT. |
||||||
|
# |
||||||
|
# You can use "make menuconfig" to make any modifications to the installed .config file. |
||||||
|
# You can then do "make savedefconfig" to generate a new defconfig file that includes your |
||||||
|
# modifications. |
||||||
|
# |
||||||
|
# CONFIG_DEV_CONSOLE is not set |
||||||
|
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set |
||||||
|
# CONFIG_SPI_EXCHANGE is not set |
||||||
|
# CONFIG_STM32H7_SYSCFG is not set |
||||||
|
CONFIG_ARCH="arm" |
||||||
|
CONFIG_ARCH_BOARD_CUSTOM=y |
||||||
|
CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/px4/fmu-v6c/nuttx-config" |
||||||
|
CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y |
||||||
|
CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" |
||||||
|
CONFIG_ARCH_CHIP="stm32h7" |
||||||
|
CONFIG_ARCH_CHIP_STM32H753II=y |
||||||
|
CONFIG_ARCH_CHIP_STM32H7=y |
||||||
|
CONFIG_ARCH_INTERRUPTSTACK=512 |
||||||
|
CONFIG_ARMV7M_BASEPRI_WAR=y |
||||||
|
CONFIG_ARMV7M_ICACHE=y |
||||||
|
CONFIG_ARMV7M_MEMCPY=y |
||||||
|
CONFIG_ARMV7M_USEBASEPRI=y |
||||||
|
CONFIG_BOARDCTL_RESET=y |
||||||
|
CONFIG_BOARD_INITTHREAD_PRIORITY=254 |
||||||
|
CONFIG_BOARD_LATE_INITIALIZE=y |
||||||
|
CONFIG_BOARD_LOOPSPERMSEC=95150 |
||||||
|
CONFIG_BOARD_RESET_ON_ASSERT=2 |
||||||
|
CONFIG_C99_BOOL8=y |
||||||
|
CONFIG_CDCACM=y |
||||||
|
CONFIG_CDCACM_IFLOWCONTROL=y |
||||||
|
CONFIG_CDCACM_PRODUCTID=0x0038 |
||||||
|
CONFIG_CDCACM_PRODUCTSTR="PX4 BL FMU v6C.x" |
||||||
|
CONFIG_CDCACM_RXBUFSIZE=600 |
||||||
|
CONFIG_CDCACM_TXBUFSIZE=12000 |
||||||
|
CONFIG_CDCACM_VENDORID=0x3185 |
||||||
|
CONFIG_CDCACM_VENDORSTR="Auterion" |
||||||
|
CONFIG_CLOCK_MONOTONIC=y |
||||||
|
CONFIG_DEBUG_FULLOPT=y |
||||||
|
CONFIG_DEBUG_SYMBOLS=y |
||||||
|
CONFIG_DEFAULT_SMALL=y |
||||||
|
CONFIG_DISABLE_MQUEUE=y |
||||||
|
CONFIG_DISABLE_PTHREAD=y |
||||||
|
CONFIG_EXPERIMENTAL=y |
||||||
|
CONFIG_FDCLONE_DISABLE=y |
||||||
|
CONFIG_FDCLONE_STDIO=y |
||||||
|
CONFIG_HAVE_CXX=y |
||||||
|
CONFIG_HAVE_CXXINITIALIZE=y |
||||||
|
CONFIG_IDLETHREAD_STACKSIZE=750 |
||||||
|
CONFIG_LIBC_FLOATINGPOINT=y |
||||||
|
CONFIG_LIBC_LONG_LONG=y |
||||||
|
CONFIG_LIBC_STRERROR=y |
||||||
|
CONFIG_LIB_BOARDCTL=y |
||||||
|
CONFIG_MEMSET_64BIT=y |
||||||
|
CONFIG_MEMSET_OPTSPEED=y |
||||||
|
CONFIG_PREALLOC_TIMERS=50 |
||||||
|
CONFIG_PTHREAD_STACK_MIN=512 |
||||||
|
CONFIG_RAM_SIZE=245760 |
||||||
|
CONFIG_RAM_START=0x20010000 |
||||||
|
CONFIG_RAW_BINARY=y |
||||||
|
CONFIG_SDCLONE_DISABLE=y |
||||||
|
CONFIG_SERIAL_TERMIOS=y |
||||||
|
CONFIG_SIG_DEFAULT=y |
||||||
|
CONFIG_SIG_SIGALRM_ACTION=y |
||||||
|
CONFIG_SIG_SIGUSR1_ACTION=y |
||||||
|
CONFIG_SIG_SIGUSR2_ACTION=y |
||||||
|
CONFIG_SPI=y |
||||||
|
CONFIG_STACK_COLORATION=y |
||||||
|
CONFIG_START_DAY=30 |
||||||
|
CONFIG_START_MONTH=11 |
||||||
|
CONFIG_STDIO_BUFFER_SIZE=32 |
||||||
|
CONFIG_STM32H7_BKPSRAM=y |
||||||
|
CONFIG_STM32H7_DMA1=y |
||||||
|
CONFIG_STM32H7_DMA2=y |
||||||
|
CONFIG_STM32H7_OTGFS=y |
||||||
|
CONFIG_STM32H7_PROGMEM=y |
||||||
|
CONFIG_STM32H7_SERIAL_DISABLE_REORDERING=y |
||||||
|
CONFIG_STM32H7_TIM1=y |
||||||
|
CONFIG_STM32H7_UART7=y |
||||||
|
CONFIG_SYSTEMTICK_HOOK=y |
||||||
|
CONFIG_SYSTEM_CDCACM=y |
||||||
|
CONFIG_TASK_NAME_SIZE=24 |
||||||
|
CONFIG_TTY_SIGINT=y |
||||||
|
CONFIG_TTY_SIGINT_CHAR=0x03 |
||||||
|
CONFIG_TTY_SIGTSTP=y |
||||||
|
CONFIG_UART7_RXBUFSIZE=512 |
||||||
|
CONFIG_UART7_RXDMA=y |
||||||
|
CONFIG_UART7_TXBUFSIZE=512 |
||||||
|
CONFIG_UART7_TXDMA=y |
||||||
|
CONFIG_USBDEV=y |
||||||
|
CONFIG_USBDEV_BUSPOWERED=y |
||||||
|
CONFIG_USBDEV_MAXPOWER=500 |
||||||
|
CONFIG_USEC_PER_TICK=1000 |
||||||
|
CONFIG_USERMAIN_STACKSIZE=2944 |
||||||
|
CONFIG_USER_ENTRYPOINT="bootloader_main" |
||||||
@ -0,0 +1,505 @@ |
|||||||
|
/************************************************************************************
|
||||||
|
* nuttx-configs/px4_fmu-v6c/include/board.h |
||||||
|
* |
||||||
|
* Copyright (C) 2016-2019 Gregory Nutt. All rights reserved. |
||||||
|
* Authors: David Sidrane <david.sidrane@nscdg.com> |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
************************************************************************************/ |
||||||
|
#ifndef __NUTTX_CONFIG_PX4_FMU_V6C_INCLUDE_BOARD_H |
||||||
|
#define __NUTTX_CONFIG_PX4_FMU_V6C_INCLUDE_BOARD_H |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
#include "board_dma_map.h" |
||||||
|
|
||||||
|
#include <nuttx/config.h> |
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__ |
||||||
|
# include <stdint.h> |
||||||
|
#endif |
||||||
|
|
||||||
|
#include "stm32_rcc.h" |
||||||
|
#include "stm32_sdmmc.h" |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Pre-processor Definitions |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
/* Clocking *************************************************************************/ |
||||||
|
/* The px4_fmu-v6C board provides the following clock sources:
|
||||||
|
* |
||||||
|
* X1: 16 MHz crystal for HSE |
||||||
|
* |
||||||
|
* So we have these clock source available within the STM32 |
||||||
|
* |
||||||
|
* HSI: 16 MHz RC factory-trimmed |
||||||
|
* HSE: 16 MHz crystal for HSE |
||||||
|
*/ |
||||||
|
|
||||||
|
#define STM32_BOARD_XTAL 16000000ul |
||||||
|
|
||||||
|
#define STM32_HSI_FREQUENCY 16000000ul |
||||||
|
#define STM32_LSI_FREQUENCY 32000 |
||||||
|
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL |
||||||
|
#define STM32_LSE_FREQUENCY 32768 |
||||||
|
|
||||||
|
/* Main PLL Configuration.
|
||||||
|
* |
||||||
|
* PLL source is HSE = 16,000,000 |
||||||
|
* |
||||||
|
* PLL_VCOx = (STM32_HSE_FREQUENCY / PLLM) * PLLN |
||||||
|
* Subject to: |
||||||
|
* |
||||||
|
* 1 <= PLLM <= 63 |
||||||
|
* 4 <= PLLN <= 512 |
||||||
|
* 150 MHz <= PLL_VCOL <= 420MHz |
||||||
|
* 192 MHz <= PLL_VCOH <= 836MHz |
||||||
|
* |
||||||
|
* SYSCLK = PLL_VCO / PLLP |
||||||
|
* CPUCLK = SYSCLK / D1CPRE |
||||||
|
* Subject to |
||||||
|
* |
||||||
|
* PLLP1 = {2, 4, 6, 8, ..., 128} |
||||||
|
* PLLP2,3 = {2, 3, 4, ..., 128} |
||||||
|
* CPUCLK <= 480 MHz |
||||||
|
*/ |
||||||
|
|
||||||
|
#define STM32_BOARD_USEHSE |
||||||
|
|
||||||
|
#define STM32_PLLCFG_PLLSRC RCC_PLLCKSELR_PLLSRC_HSE |
||||||
|
|
||||||
|
/* PLL1, wide 4 - 8 MHz input, enable DIVP, DIVQ, DIVR
|
||||||
|
* |
||||||
|
* PLL1_VCO = (16,000,000 / 1) * 60 = 960 MHz |
||||||
|
* |
||||||
|
* PLL1P = PLL1_VCO/2 = 960 MHz / 2 = 480 MHz |
||||||
|
* PLL1Q = PLL1_VCO/4 = 960 MHz / 4 = 240 MHz |
||||||
|
* PLL1R = PLL1_VCO/8 = 960 MHz / 8 = 120 MHz |
||||||
|
*/ |
||||||
|
|
||||||
|
#define STM32_PLLCFG_PLL1CFG (RCC_PLLCFGR_PLL1VCOSEL_WIDE | \ |
||||||
|
RCC_PLLCFGR_PLL1RGE_4_8_MHZ | \
|
||||||
|
RCC_PLLCFGR_DIVP1EN | \
|
||||||
|
RCC_PLLCFGR_DIVQ1EN | \
|
||||||
|
RCC_PLLCFGR_DIVR1EN) |
||||||
|
#define STM32_PLLCFG_PLL1M RCC_PLLCKSELR_DIVM1(1) |
||||||
|
#define STM32_PLLCFG_PLL1N RCC_PLL1DIVR_N1(60) |
||||||
|
#define STM32_PLLCFG_PLL1P RCC_PLL1DIVR_P1(2) |
||||||
|
#define STM32_PLLCFG_PLL1Q RCC_PLL1DIVR_Q1(4) |
||||||
|
#define STM32_PLLCFG_PLL1R RCC_PLL1DIVR_R1(8) |
||||||
|
|
||||||
|
#define STM32_VCO1_FREQUENCY ((STM32_HSE_FREQUENCY / 1) * 60) |
||||||
|
#define STM32_PLL1P_FREQUENCY (STM32_VCO1_FREQUENCY / 2) |
||||||
|
#define STM32_PLL1Q_FREQUENCY (STM32_VCO1_FREQUENCY / 4) |
||||||
|
#define STM32_PLL1R_FREQUENCY (STM32_VCO1_FREQUENCY / 8) |
||||||
|
|
||||||
|
/* PLL2 */ |
||||||
|
|
||||||
|
#define STM32_PLLCFG_PLL2CFG (RCC_PLLCFGR_PLL2VCOSEL_WIDE | \ |
||||||
|
RCC_PLLCFGR_PLL2RGE_4_8_MHZ | \
|
||||||
|
RCC_PLLCFGR_DIVP2EN | \
|
||||||
|
RCC_PLLCFGR_DIVQ2EN | \
|
||||||
|
RCC_PLLCFGR_DIVR2EN) |
||||||
|
#define STM32_PLLCFG_PLL2M RCC_PLLCKSELR_DIVM2(4) |
||||||
|
#define STM32_PLLCFG_PLL2N RCC_PLL2DIVR_N2(48) |
||||||
|
#define STM32_PLLCFG_PLL2P RCC_PLL2DIVR_P2(2) |
||||||
|
#define STM32_PLLCFG_PLL2Q RCC_PLL2DIVR_Q2(2) |
||||||
|
#define STM32_PLLCFG_PLL2R RCC_PLL2DIVR_R2(2) |
||||||
|
|
||||||
|
#define STM32_VCO2_FREQUENCY ((STM32_HSE_FREQUENCY / 4) * 48) |
||||||
|
#define STM32_PLL2P_FREQUENCY (STM32_VCO2_FREQUENCY / 2) |
||||||
|
#define STM32_PLL2Q_FREQUENCY (STM32_VCO2_FREQUENCY / 2) |
||||||
|
#define STM32_PLL2R_FREQUENCY (STM32_VCO2_FREQUENCY / 2) |
||||||
|
|
||||||
|
/* PLL3 */ |
||||||
|
|
||||||
|
#define STM32_PLLCFG_PLL3CFG (RCC_PLLCFGR_PLL3VCOSEL_WIDE | \ |
||||||
|
RCC_PLLCFGR_PLL3RGE_4_8_MHZ | \
|
||||||
|
RCC_PLLCFGR_DIVQ3EN) |
||||||
|
#define STM32_PLLCFG_PLL3M RCC_PLLCKSELR_DIVM3(4) |
||||||
|
#define STM32_PLLCFG_PLL3N RCC_PLL3DIVR_N3(48) |
||||||
|
#define STM32_PLLCFG_PLL3P RCC_PLL3DIVR_P3(2) |
||||||
|
#define STM32_PLLCFG_PLL3Q RCC_PLL3DIVR_Q3(4) |
||||||
|
#define STM32_PLLCFG_PLL3R RCC_PLL3DIVR_R3(2) |
||||||
|
|
||||||
|
#define STM32_VCO3_FREQUENCY ((STM32_HSE_FREQUENCY / 4) * 48) |
||||||
|
#define STM32_PLL3P_FREQUENCY (STM32_VCO3_FREQUENCY / 2) |
||||||
|
#define STM32_PLL3Q_FREQUENCY (STM32_VCO3_FREQUENCY / 4) |
||||||
|
#define STM32_PLL3R_FREQUENCY (STM32_VCO3_FREQUENCY / 2) |
||||||
|
|
||||||
|
/* SYSCLK = PLL1P = 480MHz
|
||||||
|
* CPUCLK = SYSCLK / 1 = 480 MHz |
||||||
|
*/ |
||||||
|
|
||||||
|
#define STM32_RCC_D1CFGR_D1CPRE (RCC_D1CFGR_D1CPRE_SYSCLK) |
||||||
|
#define STM32_SYSCLK_FREQUENCY (STM32_PLL1P_FREQUENCY) |
||||||
|
#define STM32_CPUCLK_FREQUENCY (STM32_SYSCLK_FREQUENCY / 1) |
||||||
|
|
||||||
|
/* Configure Clock Assignments */ |
||||||
|
|
||||||
|
/* AHB clock (HCLK) is SYSCLK/2 (240 MHz max)
|
||||||
|
* HCLK1 = HCLK2 = HCLK3 = HCLK4 = 240 |
||||||
|
*/ |
||||||
|
|
||||||
|
#define STM32_RCC_D1CFGR_HPRE RCC_D1CFGR_HPRE_SYSCLKd2 /* HCLK = SYSCLK / 2 */ |
||||||
|
#define STM32_ACLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* ACLK in D1, HCLK3 in D1 */ |
||||||
|
#define STM32_HCLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* HCLK in D2, HCLK4 in D3 */ |
||||||
|
#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ |
||||||
|
|
||||||
|
/* APB1 clock (PCLK1) is HCLK/2 (120 MHz) */ |
||||||
|
|
||||||
|
#define STM32_RCC_D2CFGR_D2PPRE1 RCC_D2CFGR_D2PPRE1_HCLKd2 /* PCLK1 = HCLK / 2 */ |
||||||
|
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) |
||||||
|
|
||||||
|
/* APB2 clock (PCLK2) is HCLK/2 (120 MHz) */ |
||||||
|
|
||||||
|
#define STM32_RCC_D2CFGR_D2PPRE2 RCC_D2CFGR_D2PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ |
||||||
|
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) |
||||||
|
|
||||||
|
/* APB3 clock (PCLK3) is HCLK/2 (120 MHz) */ |
||||||
|
|
||||||
|
#define STM32_RCC_D1CFGR_D1PPRE RCC_D1CFGR_D1PPRE_HCLKd2 /* PCLK3 = HCLK / 2 */ |
||||||
|
#define STM32_PCLK3_FREQUENCY (STM32_HCLK_FREQUENCY/2) |
||||||
|
|
||||||
|
/* APB4 clock (PCLK4) is HCLK/4 (120 MHz) */ |
||||||
|
|
||||||
|
#define STM32_RCC_D3CFGR_D3PPRE RCC_D3CFGR_D3PPRE_HCLKd2 /* PCLK4 = HCLK / 2 */ |
||||||
|
#define STM32_PCLK4_FREQUENCY (STM32_HCLK_FREQUENCY/2) |
||||||
|
|
||||||
|
/* Timer clock frequencies */ |
||||||
|
|
||||||
|
/* Timers driven from APB1 will be twice PCLK1 */ |
||||||
|
|
||||||
|
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) |
||||||
|
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) |
||||||
|
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) |
||||||
|
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) |
||||||
|
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) |
||||||
|
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) |
||||||
|
#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) |
||||||
|
#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) |
||||||
|
#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) |
||||||
|
|
||||||
|
/* Timers driven from APB2 will be twice PCLK2 */ |
||||||
|
|
||||||
|
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) |
||||||
|
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) |
||||||
|
#define STM32_APB2_TIM15_CLKIN (2*STM32_PCLK2_FREQUENCY) |
||||||
|
#define STM32_APB2_TIM16_CLKIN (2*STM32_PCLK2_FREQUENCY) |
||||||
|
#define STM32_APB2_TIM17_CLKIN (2*STM32_PCLK2_FREQUENCY) |
||||||
|
|
||||||
|
/* Kernel Clock Configuration
|
||||||
|
* |
||||||
|
* Note: look at Table 54 in ST Manual |
||||||
|
*/ |
||||||
|
|
||||||
|
/* I2C123 clock source */ |
||||||
|
|
||||||
|
#define STM32_RCC_D2CCIP2R_I2C123SRC RCC_D2CCIP2R_I2C123SEL_HSI |
||||||
|
|
||||||
|
/* I2C4 clock source */ |
||||||
|
|
||||||
|
#define STM32_RCC_D3CCIPR_I2C4SRC RCC_D3CCIPR_I2C4SEL_HSI |
||||||
|
|
||||||
|
/* SPI123 clock source */ |
||||||
|
|
||||||
|
#define STM32_RCC_D2CCIP1R_SPI123SRC RCC_D2CCIP1R_SPI123SEL_PLL2 |
||||||
|
|
||||||
|
/* SPI45 clock source */ |
||||||
|
|
||||||
|
#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 |
||||||
|
|
||||||
|
/* SPI6 clock source */ |
||||||
|
|
||||||
|
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 |
||||||
|
|
||||||
|
/* USB 1 and 2 clock source */ |
||||||
|
|
||||||
|
#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 |
||||||
|
|
||||||
|
/* ADC 1 2 3 clock source */ |
||||||
|
|
||||||
|
#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 |
||||||
|
|
||||||
|
/* FDCAN 1 2 clock source */ |
||||||
|
|
||||||
|
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */ |
||||||
|
|
||||||
|
#define STM32_FDCANCLK STM32_HSE_FREQUENCY |
||||||
|
|
||||||
|
/* FLASH wait states
|
||||||
|
* |
||||||
|
* ------------ ---------- ----------- |
||||||
|
* Vcore MAX ACLK WAIT STATES |
||||||
|
* ------------ ---------- ----------- |
||||||
|
* 1.15-1.26 V 70 MHz 0 |
||||||
|
* (VOS1 level) 140 MHz 1 |
||||||
|
* 210 MHz 2 |
||||||
|
* 1.05-1.15 V 55 MHz 0 |
||||||
|
* (VOS2 level) 110 MHz 1 |
||||||
|
* 165 MHz 2 |
||||||
|
* 220 MHz 3 |
||||||
|
* 0.95-1.05 V 45 MHz 0 |
||||||
|
* (VOS3 level) 90 MHz 1 |
||||||
|
* 135 MHz 2 |
||||||
|
* 180 MHz 3 |
||||||
|
* 225 MHz 4 |
||||||
|
* ------------ ---------- ----------- |
||||||
|
*/ |
||||||
|
|
||||||
|
#define BOARD_FLASH_WAITSTATES 2 |
||||||
|
|
||||||
|
/* SDMMC definitions ********************************************************/ |
||||||
|
|
||||||
|
/* Init 400kHz, freq = PLL1Q/(2*div) div = PLL1Q/(2*freq) */ |
||||||
|
|
||||||
|
#define STM32_SDMMC_INIT_CLKDIV (300 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) |
||||||
|
|
||||||
|
/* 25 MHz Max for now, 25 mHZ = PLL1Q/(2*div), div = PLL1Q/(2*freq)
|
||||||
|
* div = 4.8 = 240 / 50, So round up to 5 for default speed 24 MB/s |
||||||
|
*/ |
||||||
|
|
||||||
|
#if defined(CONFIG_STM32H7_SDMMC_XDMA) || defined(CONFIG_STM32H7_SDMMC_IDMA) |
||||||
|
# define STM32_SDMMC_MMCXFR_CLKDIV (5 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) |
||||||
|
#else |
||||||
|
# define STM32_SDMMC_MMCXFR_CLKDIV (100 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) |
||||||
|
#endif |
||||||
|
#if defined(CONFIG_STM32H7_SDMMC_XDMA) || defined(CONFIG_STM32H7_SDMMC_IDMA) |
||||||
|
# define STM32_SDMMC_SDXFR_CLKDIV (5 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) |
||||||
|
#else |
||||||
|
# define STM32_SDMMC_SDXFR_CLKDIV (100 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) |
||||||
|
#endif |
||||||
|
|
||||||
|
#define STM32_SDMMC_CLKCR_EDGE STM32_SDMMC_CLKCR_NEGEDGE |
||||||
|
|
||||||
|
/* LED definitions ******************************************************************/ |
||||||
|
/* The PX4 FMUV6C board has three, LED_GREEN a Green LED, LED_BLUE a Blue LED and
|
||||||
|
* LED_RED a Red LED, that can be controlled by software. |
||||||
|
* |
||||||
|
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. |
||||||
|
* The following definitions are used to access individual LEDs. |
||||||
|
*/ |
||||||
|
|
||||||
|
/* LED index values for use with board_userled() */ |
||||||
|
|
||||||
|
/* LED definitions ******************************************************************/ |
||||||
|
/* The px4_fmu-v6c board has three, LED_GREEN a Green LED, LED_BLUE a Blue LED and
|
||||||
|
* LED_RED a Red LED, that can be controlled by software. |
||||||
|
* |
||||||
|
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. |
||||||
|
* The following definitions are used to access individual LEDs. |
||||||
|
*/ |
||||||
|
|
||||||
|
/* LED index values for use with board_userled() */ |
||||||
|
|
||||||
|
#define BOARD_LED1 0 |
||||||
|
#define BOARD_LED2 1 |
||||||
|
#define BOARD_LED3 2 |
||||||
|
#define BOARD_NLEDS 3 |
||||||
|
|
||||||
|
#define BOARD_LED_RED BOARD_LED1 |
||||||
|
#define BOARD_LED_GREEN BOARD_LED2 |
||||||
|
#define BOARD_LED_BLUE BOARD_LED3 |
||||||
|
|
||||||
|
/* LED bits for use with board_userled_all() */ |
||||||
|
|
||||||
|
#define BOARD_LED1_BIT (1 << BOARD_LED1) |
||||||
|
#define BOARD_LED2_BIT (1 << BOARD_LED2) |
||||||
|
#define BOARD_LED3_BIT (1 << BOARD_LED3) |
||||||
|
|
||||||
|
/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
|
||||||
|
* include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related |
||||||
|
* events as follows: |
||||||
|
* |
||||||
|
* |
||||||
|
* SYMBOL Meaning LED state |
||||||
|
* Red Green Blue |
||||||
|
* ---------------------- -------------------------- ------ ------ ----*/ |
||||||
|
|
||||||
|
#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */ |
||||||
|
#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */ |
||||||
|
#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */ |
||||||
|
#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */ |
||||||
|
#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */ |
||||||
|
#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */ |
||||||
|
#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */ |
||||||
|
#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */ |
||||||
|
#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */ |
||||||
|
|
||||||
|
/* Thus if the Green LED is statically on, NuttX has successfully booted and
|
||||||
|
* is, apparently, running normally. If the Red LED is flashing at |
||||||
|
* approximately 2Hz, then a fatal error has been detected and the system |
||||||
|
* has halted. |
||||||
|
*/ |
||||||
|
|
||||||
|
/* Alternate function pin selections ************************************************/ |
||||||
|
|
||||||
|
#define GPIO_USART1_RX GPIO_USART1_RX_2 /* PA10 */ |
||||||
|
#define GPIO_USART1_TX GPIO_USART1_TX_3 /* PB6 */ |
||||||
|
|
||||||
|
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */ |
||||||
|
#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */ |
||||||
|
|
||||||
|
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */ |
||||||
|
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */ |
||||||
|
|
||||||
|
#define GPIO_UART5_RX GPIO_UART5_RX_3 /* PD2 */ |
||||||
|
#define GPIO_UART5_TX GPIO_UART5_TX_3 /* PC12 */ |
||||||
|
// GPIO_UART5_RTS no remap /* PC8 */
|
||||||
|
// GPIO_UART5_CTS No remap /* PC9 */
|
||||||
|
|
||||||
|
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */ |
||||||
|
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */ |
||||||
|
|
||||||
|
#define GPIO_UART7_RX GPIO_UART7_RX_3 /* PE7 */ |
||||||
|
#define GPIO_UART7_TX GPIO_UART7_TX_3 /* PE8 */ |
||||||
|
#define GPIO_UART7_RTS GPIO_UART7_RTS_1 /* PE9 */ |
||||||
|
#define GPIO_UART7_CTS GPIO_UART7_CTS_1 /* PE10 */ |
||||||
|
|
||||||
|
#define GPIO_UART8_RX GPIO_UART8_RX_1 /* PE0 */ |
||||||
|
#define GPIO_UART8_TX GPIO_UART8_TX_1 /* PE1 */ |
||||||
|
|
||||||
|
|
||||||
|
/* CAN
|
||||||
|
* |
||||||
|
* CAN1 is routed to transceiver. |
||||||
|
* CAN2 is routed to transceiver. |
||||||
|
*/ |
||||||
|
#define GPIO_CAN1_RX GPIO_CAN1_RX_3 /* PD0 */ |
||||||
|
#define GPIO_CAN1_TX GPIO_CAN1_TX_3 /* PD1 */ |
||||||
|
#define GPIO_CAN2_RX GPIO_CAN2_RX_2 /* PB5 */ |
||||||
|
#define GPIO_CAN2_TX GPIO_CAN2_TX_1 /* PB13 */ |
||||||
|
|
||||||
|
/* SPI
|
||||||
|
* SPI1 is sensors |
||||||
|
* SPI2 is FRAM |
||||||
|
* |
||||||
|
*/ |
||||||
|
|
||||||
|
#define ADJ_SLEW_RATE(p) (((p) & ~GPIO_SPEED_MASK) | (GPIO_SPEED_2MHz)) |
||||||
|
|
||||||
|
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 /* PA6 */ |
||||||
|
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 /* PA7 */ |
||||||
|
#define GPIO_SPI1_SCK ADJ_SLEW_RATE(GPIO_SPI1_SCK_1) /* PA5 */ |
||||||
|
|
||||||
|
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_2 /* PC2 */ |
||||||
|
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_3 /* PC3 */ |
||||||
|
#define GPIO_SPI2_SCK ADJ_SLEW_RATE(GPIO_SPI2_SCK_5) /* PD3 */ |
||||||
|
|
||||||
|
/* I2C
|
||||||
|
* |
||||||
|
* The optional _GPIO configurations allow the I2C driver to manually |
||||||
|
* reset the bus to clear stuck slaves. They match the pin configuration, |
||||||
|
* but are normally-high GPIOs. |
||||||
|
* |
||||||
|
*/ |
||||||
|
|
||||||
|
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2 /* PB8 */ |
||||||
|
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 /* PB7 */ |
||||||
|
|
||||||
|
#define GPIO_I2C1_SCL_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN8) |
||||||
|
#define GPIO_I2C1_SDA_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN7) |
||||||
|
|
||||||
|
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 /* PB10 */ |
||||||
|
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 /* PB11*/ |
||||||
|
|
||||||
|
#define GPIO_I2C2_SCL_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10) |
||||||
|
#define GPIO_I2C2_SDA_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN11) |
||||||
|
|
||||||
|
#define GPIO_I2C4_SCL GPIO_I2C4_SCL_1 /* PD12 */ |
||||||
|
#define GPIO_I2C4_SDA GPIO_I2C4_SDA_1 /* PD13 */ |
||||||
|
|
||||||
|
#define GPIO_I2C4_SCL_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTD | GPIO_PIN12) |
||||||
|
#define GPIO_I2C4_SDA_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTD | GPIO_PIN13) |
||||||
|
|
||||||
|
/* SDMMC2
|
||||||
|
* |
||||||
|
* VDD 3.3 |
||||||
|
* GND |
||||||
|
* SDMMC2_CK PD6 |
||||||
|
* SDMMC2_CMD PD7 |
||||||
|
* SDMMC2_D0 PB14 |
||||||
|
* SDMMC2_D1 PB15 |
||||||
|
* SDMMC2_D2 PB3 |
||||||
|
* SDMMC2_D3 PB4 |
||||||
|
*/ |
||||||
|
|
||||||
|
#define GPIO_SDMMC2_CK GPIO_SDMMC2_CK_1 /* PD6 */ |
||||||
|
#define GPIO_SDMMC2_CMD GPIO_SDMMC2_CMD_1 /* PD7 */ |
||||||
|
// GPIO_SDMMC2_D0 No Remap /* PB14 */
|
||||||
|
// GPIO_SDMMC2_D1 No Remap /* PB15 */
|
||||||
|
#define GPIO_SDMMC2_D2 GPIO_SDMMC2_D2_2 /* PB3 */ |
||||||
|
// GPIO_SDMMC2_D3 No Remap /* PB4 */
|
||||||
|
|
||||||
|
/* USB
|
||||||
|
* |
||||||
|
* OTG_FS_DM PA11 |
||||||
|
* OTG_FS_DP PA12 |
||||||
|
* VBUS PA9 |
||||||
|
*/ |
||||||
|
|
||||||
|
|
||||||
|
/* Board provides GPIO or other Hardware for signaling to timing analyzer */ |
||||||
|
|
||||||
|
#if defined(CONFIG_BOARD_USE_PROBES) |
||||||
|
# include "stm32_gpio.h" |
||||||
|
# define PROBE_N(n) (1<<((n)-1)) |
||||||
|
# define PROBE_1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN8) /* PA8 AUX1 */ |
||||||
|
# define PROBE_2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11) /* PE11 AUX2 */ |
||||||
|
# define PROBE_3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13) /* PE13 AUX3 */ |
||||||
|
# define PROBE_4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN14) /* PE14 AUX4 */ |
||||||
|
# define PROBE_5 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14) /* PD14 AUX5 */ |
||||||
|
# define PROBE_6 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN15) /* PD15 AUX6 */ |
||||||
|
# define PROBE_7 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN0) /* PA0 AUX7 */ |
||||||
|
# define PROBE_8 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN2) /* PA1 AUX8 */ |
||||||
|
|
||||||
|
# define PROBE_INIT(mask) \ |
||||||
|
do { \
|
||||||
|
if ((mask)& PROBE_N(1)) { stm32_configgpio(PROBE_1); } \
|
||||||
|
if ((mask)& PROBE_N(2)) { stm32_configgpio(PROBE_2); } \
|
||||||
|
if ((mask)& PROBE_N(3)) { stm32_configgpio(PROBE_3); } \
|
||||||
|
if ((mask)& PROBE_N(4)) { stm32_configgpio(PROBE_4); } \
|
||||||
|
if ((mask)& PROBE_N(5)) { stm32_configgpio(PROBE_5); } \
|
||||||
|
if ((mask)& PROBE_N(6)) { stm32_configgpio(PROBE_6); } \
|
||||||
|
if ((mask)& PROBE_N(7)) { stm32_configgpio(PROBE_7); } \
|
||||||
|
if ((mask)& PROBE_N(8)) { stm32_configgpio(PROBE_8); } \
|
||||||
|
} while(0) |
||||||
|
|
||||||
|
# define PROBE(n,s) do {stm32_gpiowrite(PROBE_##n,(s));}while(0) |
||||||
|
# define PROBE_MARK(n) PROBE(n,false);PROBE(n,true) |
||||||
|
#else |
||||||
|
# define PROBE_INIT(mask) |
||||||
|
# define PROBE(n,s) |
||||||
|
# define PROBE_MARK(n) |
||||||
|
#endif |
||||||
|
|
||||||
|
#endif /*__NUTTX_CONFIG_PX4_FMU_V6C_INCLUDE_BOARD_H */ |
||||||
@ -0,0 +1,79 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (c) 2020 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
#pragma once |
||||||
|
|
||||||
|
// DMAMUX1 Using at most 8 Channels on DMA1 -------- Assigned
|
||||||
|
// V
|
||||||
|
|
||||||
|
#define DMAMAP_SPI1_RX DMAMAP_DMA12_SPI1RX_0 /* 1 DMA1:37 BMI055, ICM-42688-P */ |
||||||
|
#define DMAMAP_SPI1_TX DMAMAP_DMA12_SPI1TX_0 /* 2 DMA1:38 BMI055, ICM-42688-P */ |
||||||
|
|
||||||
|
#define DMAMAP_SPI2_RX DMAMAP_DMA12_SPI2RX_0 /* 3 DMA1:39 FRAM */ |
||||||
|
#define DMAMAP_SPI2_TX DMAMAP_DMA12_SPI2TX_0 /* 4 DMA1:40 FRAM */ |
||||||
|
|
||||||
|
//#define DMAMAP_USART1_RX DMAMAP_DMA12_USART1RX_0 /* DMA1:41 GPS1 */
|
||||||
|
//#define DMAMAP_USART1_TX DMAMAP_DMA12_USART1TX_0 /* DMA1:42 GPS1 */
|
||||||
|
|
||||||
|
//#define DMAMAP_USART2_RX DMAMAP_DMA12_USART2RX_0 /* DMA1:43 Telem3 */
|
||||||
|
//#define DMAMAP_USART2_TX DMAMAP_DMA12_USART2TX_0 /* DMA1:44 Telem3 */
|
||||||
|
|
||||||
|
//#define DMAMAP_USART3_RX DMAMAP_DMA12_USART3RX_0 /* DMA1:45 DEBUG */
|
||||||
|
//#define DMAMAP_USART3_TX DMAMAP_DMA12_USART3TX_0 /* DMA1:46 DEBUG */
|
||||||
|
|
||||||
|
//#define DMAMAP_UART4_RX DMAMAP_DMA12_UART4RX_0 /* DMA1:63 EXT2 */
|
||||||
|
//#define DMAMAP_UART4_TX DMAMAP_DMA12_UART4TX_0 /* DMA1:64 EXT2 */
|
||||||
|
|
||||||
|
#define DMAMAP_USART6_RX DMAMAP_DMA12_USART6RX_0 /* 5 DMA1:71 PX4IO */ |
||||||
|
#define DMAMAP_USART6_TX DMAMAP_DMA12_USART6TX_0 /* 6 DMA1:72 PX4IO */ |
||||||
|
|
||||||
|
// Assigned in timer_config.cpp
|
||||||
|
|
||||||
|
// Timer 4 /* 7 DMA1:32 TIM4UP */
|
||||||
|
// Timer 5 /* 8 DMA1:50 TIM5UP */
|
||||||
|
|
||||||
|
// DMAMUX2 Using at most 8 Channels on DMA2 -------- Assigned
|
||||||
|
// V
|
||||||
|
|
||||||
|
|
||||||
|
#define DMAMAP_USART3_RX DMAMAP_DMA12_USART3RX_1 /* 3 DMA2:45 DEBUG */ |
||||||
|
#define DMAMAP_USART3_TX DMAMAP_DMA12_USART3TX_1 /* 4 DMA2:46 DEBUG */ |
||||||
|
|
||||||
|
#define DMAMAP_UART5_RX DMAMAP_DMA12_UART5RX_1 /* 5 DMA2:65 TELEM2 */ |
||||||
|
#define DMAMAP_UART5_TX DMAMAP_DMA12_UART5TX_1 /* 6 DMA2:66 TELEM2 */ |
||||||
|
|
||||||
|
#define DMAMAP_UART7_RX DMAMAP_DMA12_UART7RX_1 /* 7 DMA1:79 TELEM1 */ |
||||||
|
#define DMAMAP_UART7_TX DMAMAP_DMA12_UART7TX_1 /* 8 DMA1:80 TELEM1 */ |
||||||
|
|
||||||
|
//#define DMAMAP_UART8_RX DMAMAP_DMA12_UART8RX_1 /* DMA1:81 GPS2 */
|
||||||
|
//#define DMAMAP_UART8_TX DMAMAP_DMA12_UART8TX_1 /* DMA1:82 GPS2 */
|
||||||
@ -0,0 +1,241 @@ |
|||||||
|
# |
||||||
|
# This file is autogenerated: PLEASE DO NOT EDIT IT. |
||||||
|
# |
||||||
|
# You can use "make menuconfig" to make any modifications to the installed .config file. |
||||||
|
# You can then do "make savedefconfig" to generate a new defconfig file that includes your |
||||||
|
# modifications. |
||||||
|
# |
||||||
|
# CONFIG_DISABLE_ENVIRON is not set |
||||||
|
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set |
||||||
|
# CONFIG_MMCSD_HAVE_CARDDETECT is not set |
||||||
|
# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set |
||||||
|
# CONFIG_MMCSD_MMCSUPPORT is not set |
||||||
|
# CONFIG_MMCSD_SPI is not set |
||||||
|
# CONFIG_NSH_DISABLEBG is not set |
||||||
|
# CONFIG_NSH_DISABLESCRIPT is not set |
||||||
|
# CONFIG_NSH_DISABLE_DF is not set |
||||||
|
# CONFIG_NSH_DISABLE_EXEC is not set |
||||||
|
# CONFIG_NSH_DISABLE_EXIT is not set |
||||||
|
# CONFIG_NSH_DISABLE_GET is not set |
||||||
|
# CONFIG_NSH_DISABLE_ITEF is not set |
||||||
|
# CONFIG_NSH_DISABLE_LOOPS is not set |
||||||
|
# CONFIG_NSH_DISABLE_MKFATFS is not set |
||||||
|
# CONFIG_NSH_DISABLE_SEMICOLON is not set |
||||||
|
# CONFIG_NSH_DISABLE_TIME is not set |
||||||
|
CONFIG_ARCH="arm" |
||||||
|
CONFIG_ARCH_BOARD_CUSTOM=y |
||||||
|
CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/px4/fmu-v6c/nuttx-config" |
||||||
|
CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y |
||||||
|
CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" |
||||||
|
CONFIG_ARCH_CHIP="stm32h7" |
||||||
|
CONFIG_ARCH_CHIP_STM32H743VI=y |
||||||
|
CONFIG_ARCH_CHIP_STM32H7=y |
||||||
|
CONFIG_ARCH_INTERRUPTSTACK=512 |
||||||
|
CONFIG_ARCH_STACKDUMP=y |
||||||
|
CONFIG_ARMV7M_BASEPRI_WAR=y |
||||||
|
CONFIG_ARMV7M_DCACHE=y |
||||||
|
CONFIG_ARMV7M_DTCM=y |
||||||
|
CONFIG_ARMV7M_ICACHE=y |
||||||
|
CONFIG_ARMV7M_MEMCPY=y |
||||||
|
CONFIG_ARMV7M_USEBASEPRI=y |
||||||
|
CONFIG_ARM_MPU_EARLY_RESET=y |
||||||
|
CONFIG_BOARDCTL_RESET=y |
||||||
|
CONFIG_BOARD_CRASHDUMP=y |
||||||
|
CONFIG_BOARD_LOOPSPERMSEC=95751 |
||||||
|
CONFIG_BOARD_RESET_ON_ASSERT=2 |
||||||
|
CONFIG_BUILTIN=y |
||||||
|
CONFIG_C99_BOOL8=y |
||||||
|
CONFIG_CDCACM=y |
||||||
|
CONFIG_CDCACM_IFLOWCONTROL=y |
||||||
|
CONFIG_CDCACM_PRODUCTID=0x0038 |
||||||
|
CONFIG_CDCACM_PRODUCTSTR="PX4 FMU v6C.x" |
||||||
|
CONFIG_CDCACM_RXBUFSIZE=600 |
||||||
|
CONFIG_CDCACM_TXBUFSIZE=12000 |
||||||
|
CONFIG_CDCACM_VENDORID=0x3185 |
||||||
|
CONFIG_CDCACM_VENDORSTR="Auterion" |
||||||
|
CONFIG_CLOCK_MONOTONIC=y |
||||||
|
CONFIG_DEBUG_FULLOPT=y |
||||||
|
CONFIG_DEBUG_HARDFAULT_ALERT=y |
||||||
|
CONFIG_DEBUG_MEMFAULT=y |
||||||
|
CONFIG_DEBUG_SYMBOLS=y |
||||||
|
CONFIG_DEFAULT_SMALL=y |
||||||
|
CONFIG_DEV_FIFO_SIZE=0 |
||||||
|
CONFIG_DEV_PIPE_MAXSIZE=1024 |
||||||
|
CONFIG_DEV_PIPE_SIZE=70 |
||||||
|
CONFIG_EXPERIMENTAL=y |
||||||
|
CONFIG_FAT_DMAMEMORY=y |
||||||
|
CONFIG_FAT_LCNAMES=y |
||||||
|
CONFIG_FAT_LFN=y |
||||||
|
CONFIG_FAT_LFN_ALIAS_HASH=y |
||||||
|
CONFIG_FDCLONE_STDIO=y |
||||||
|
CONFIG_FS_BINFS=y |
||||||
|
CONFIG_FS_CROMFS=y |
||||||
|
CONFIG_FS_FAT=y |
||||||
|
CONFIG_FS_FATTIME=y |
||||||
|
CONFIG_FS_PROCFS=y |
||||||
|
CONFIG_FS_PROCFS_INCLUDE_PROGMEM=y |
||||||
|
CONFIG_FS_PROCFS_MAX_TASKS=64 |
||||||
|
CONFIG_FS_PROCFS_REGISTER=y |
||||||
|
CONFIG_FS_ROMFS=y |
||||||
|
CONFIG_GRAN=y |
||||||
|
CONFIG_GRAN_INTR=y |
||||||
|
CONFIG_HAVE_CXX=y |
||||||
|
CONFIG_HAVE_CXXINITIALIZE=y |
||||||
|
CONFIG_I2C=y |
||||||
|
CONFIG_I2C_RESET=y |
||||||
|
CONFIG_IDLETHREAD_STACKSIZE=750 |
||||||
|
CONFIG_IOB_NBUFFERS=24 |
||||||
|
CONFIG_IOB_NCHAINS=24 |
||||||
|
CONFIG_LIBC_FLOATINGPOINT=y |
||||||
|
CONFIG_LIBC_LONG_LONG=y |
||||||
|
CONFIG_LIBC_STRERROR=y |
||||||
|
CONFIG_MEMSET_64BIT=y |
||||||
|
CONFIG_MEMSET_OPTSPEED=y |
||||||
|
CONFIG_MMCSD=y |
||||||
|
CONFIG_MMCSD_SDIO=y |
||||||
|
CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y |
||||||
|
CONFIG_MM_IOB=y |
||||||
|
CONFIG_MM_REGIONS=4 |
||||||
|
CONFIG_MTD=y |
||||||
|
CONFIG_MTD_BYTE_WRITE=y |
||||||
|
CONFIG_MTD_PARTITION=y |
||||||
|
CONFIG_MTD_PROGMEM=y |
||||||
|
CONFIG_MTD_RAMTRON=y |
||||||
|
CONFIG_NAME_MAX=40 |
||||||
|
CONFIG_NSH_ARCHINIT=y |
||||||
|
CONFIG_NSH_ARGCAT=y |
||||||
|
CONFIG_NSH_BUILTIN_APPS=y |
||||||
|
CONFIG_NSH_CMDPARMS=y |
||||||
|
CONFIG_NSH_CROMFSETC=y |
||||||
|
CONFIG_NSH_LINELEN=128 |
||||||
|
CONFIG_NSH_MAXARGUMENTS=15 |
||||||
|
CONFIG_NSH_NESTDEPTH=8 |
||||||
|
CONFIG_NSH_QUOTE=y |
||||||
|
CONFIG_NSH_ROMFSETC=y |
||||||
|
CONFIG_NSH_ROMFSSECTSIZE=128 |
||||||
|
CONFIG_NSH_STRERROR=y |
||||||
|
CONFIG_NSH_VARS=y |
||||||
|
CONFIG_OTG_ID_GPIO_DISABLE=y |
||||||
|
CONFIG_PIPES=y |
||||||
|
CONFIG_PREALLOC_TIMERS=50 |
||||||
|
CONFIG_PRIORITY_INHERITANCE=y |
||||||
|
CONFIG_PTHREAD_MUTEX_ROBUST=y |
||||||
|
CONFIG_PTHREAD_STACK_MIN=512 |
||||||
|
CONFIG_RAMTRON_SETSPEED=y |
||||||
|
CONFIG_RAM_SIZE=245760 |
||||||
|
CONFIG_RAM_START=0x20010000 |
||||||
|
CONFIG_RAW_BINARY=y |
||||||
|
CONFIG_READLINE_CMD_HISTORY=y |
||||||
|
CONFIG_READLINE_TABCOMPLETION=y |
||||||
|
CONFIG_RTC_DATETIME=y |
||||||
|
CONFIG_SCHED_ATEXIT=y |
||||||
|
CONFIG_SCHED_HPWORK=y |
||||||
|
CONFIG_SCHED_HPWORKPRIORITY=249 |
||||||
|
CONFIG_SCHED_HPWORKSTACKSIZE=1280 |
||||||
|
CONFIG_SCHED_INSTRUMENTATION=y |
||||||
|
CONFIG_SCHED_INSTRUMENTATION_EXTERNAL=y |
||||||
|
CONFIG_SCHED_LPWORK=y |
||||||
|
CONFIG_SCHED_LPWORKPRIORITY=50 |
||||||
|
CONFIG_SCHED_LPWORKSTACKSIZE=1632 |
||||||
|
CONFIG_SCHED_WAITPID=y |
||||||
|
CONFIG_SDCLONE_DISABLE=y |
||||||
|
CONFIG_SEM_NNESTPRIO=8 |
||||||
|
CONFIG_SEM_PREALLOCHOLDERS=0 |
||||||
|
CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y |
||||||
|
CONFIG_SERIAL_TERMIOS=y |
||||||
|
CONFIG_SIG_DEFAULT=y |
||||||
|
CONFIG_SIG_SIGALRM_ACTION=y |
||||||
|
CONFIG_SIG_SIGUSR1_ACTION=y |
||||||
|
CONFIG_SIG_SIGUSR2_ACTION=y |
||||||
|
CONFIG_SIG_SIGWORK=4 |
||||||
|
CONFIG_STACK_COLORATION=y |
||||||
|
CONFIG_START_DAY=30 |
||||||
|
CONFIG_START_MONTH=11 |
||||||
|
CONFIG_STDIO_BUFFER_SIZE=256 |
||||||
|
CONFIG_STM32H7_ADC1=y |
||||||
|
CONFIG_STM32H7_ADC3=y |
||||||
|
CONFIG_STM32H7_BBSRAM=y |
||||||
|
CONFIG_STM32H7_BBSRAM_FILES=5 |
||||||
|
CONFIG_STM32H7_BDMA=y |
||||||
|
CONFIG_STM32H7_BKPSRAM=y |
||||||
|
CONFIG_STM32H7_DMA1=y |
||||||
|
CONFIG_STM32H7_DMA2=y |
||||||
|
CONFIG_STM32H7_DMACAPABLE=y |
||||||
|
CONFIG_STM32H7_FLOWCONTROL_BROKEN=y |
||||||
|
CONFIG_STM32H7_I2C1=y |
||||||
|
CONFIG_STM32H7_I2C2=y |
||||||
|
CONFIG_STM32H7_I2C4=y |
||||||
|
CONFIG_STM32H7_I2C_DYNTIMEO=y |
||||||
|
CONFIG_STM32H7_I2C_DYNTIMEO_STARTSTOP=10 |
||||||
|
CONFIG_STM32H7_OTGFS=y |
||||||
|
CONFIG_STM32H7_PROGMEM=y |
||||||
|
CONFIG_STM32H7_RTC=y |
||||||
|
CONFIG_STM32H7_RTC_HSECLOCK=y |
||||||
|
CONFIG_STM32H7_RTC_MAGIC_REG=1 |
||||||
|
CONFIG_STM32H7_SAVE_CRASHDUMP=y |
||||||
|
CONFIG_STM32H7_SDMMC2=y |
||||||
|
CONFIG_STM32H7_SERIALBRK_BSDCOMPAT=y |
||||||
|
CONFIG_STM32H7_SERIAL_DISABLE_REORDERING=y |
||||||
|
CONFIG_STM32H7_SPI1=y |
||||||
|
CONFIG_STM32H7_SPI1_DMA=y |
||||||
|
CONFIG_STM32H7_SPI1_DMA_BUFFER=1024 |
||||||
|
CONFIG_STM32H7_SPI2=y |
||||||
|
CONFIG_STM32H7_SPI2_DMA=y |
||||||
|
CONFIG_STM32H7_SPI2_DMA_BUFFER=4096 |
||||||
|
CONFIG_STM32H7_SPI_DMA=y |
||||||
|
CONFIG_STM32H7_TIM12=y |
||||||
|
CONFIG_STM32H7_TIM1=y |
||||||
|
CONFIG_STM32H7_TIM4=y |
||||||
|
CONFIG_STM32H7_TIM5=y |
||||||
|
CONFIG_STM32H7_UART5=y |
||||||
|
CONFIG_STM32H7_UART7=y |
||||||
|
CONFIG_STM32H7_UART8=y |
||||||
|
CONFIG_STM32H7_USART1=y |
||||||
|
CONFIG_STM32H7_USART2=y |
||||||
|
CONFIG_STM32H7_USART3=y |
||||||
|
CONFIG_STM32H7_USART6=y |
||||||
|
CONFIG_STM32H7_USART_BREAKS=y |
||||||
|
CONFIG_STM32H7_USART_INVERT=y |
||||||
|
CONFIG_STM32H7_USART_SINGLEWIRE=y |
||||||
|
CONFIG_STM32H7_USART_SWAP=y |
||||||
|
CONFIG_SYSTEM_CDCACM=y |
||||||
|
CONFIG_SYSTEM_NSH=y |
||||||
|
CONFIG_TASK_NAME_SIZE=24 |
||||||
|
CONFIG_UART5_IFLOWCONTROL=y |
||||||
|
CONFIG_UART5_OFLOWCONTROL=y |
||||||
|
CONFIG_UART5_RXDMA=y |
||||||
|
CONFIG_UART5_TXBUFSIZE=3000 |
||||||
|
CONFIG_UART5_TXDMA=y |
||||||
|
CONFIG_UART7_BAUD=57600 |
||||||
|
CONFIG_UART7_IFLOWCONTROL=y |
||||||
|
CONFIG_UART7_OFLOWCONTROL=y |
||||||
|
CONFIG_UART7_RXBUFSIZE=600 |
||||||
|
CONFIG_UART7_RXDMA=y |
||||||
|
CONFIG_UART7_TXBUFSIZE=3000 |
||||||
|
CONFIG_UART7_TXDMA=y |
||||||
|
CONFIG_UART8_BAUD=57600 |
||||||
|
CONFIG_UART8_RXBUFSIZE=600 |
||||||
|
CONFIG_UART8_TXBUFSIZE=1500 |
||||||
|
CONFIG_USART1_BAUD=57600 |
||||||
|
CONFIG_USART1_RXBUFSIZE=600 |
||||||
|
CONFIG_USART1_TXBUFSIZE=1500 |
||||||
|
CONFIG_USART2_BAUD=57600 |
||||||
|
CONFIG_USART2_RXBUFSIZE=600 |
||||||
|
CONFIG_USART2_TXBUFSIZE=3000 |
||||||
|
CONFIG_USART3_BAUD=57600 |
||||||
|
CONFIG_USART3_RXBUFSIZE=180 |
||||||
|
CONFIG_USART3_RXDMA=y |
||||||
|
CONFIG_USART3_SERIAL_CONSOLE=y |
||||||
|
CONFIG_USART3_TXBUFSIZE=1500 |
||||||
|
CONFIG_USART3_TXDMA=y |
||||||
|
CONFIG_USART6_BAUD=57600 |
||||||
|
CONFIG_USART6_RXBUFSIZE=600 |
||||||
|
CONFIG_USART6_TXBUFSIZE=1500 |
||||||
|
CONFIG_USBDEV=y |
||||||
|
CONFIG_USBDEV_BUSPOWERED=y |
||||||
|
CONFIG_USBDEV_MAXPOWER=500 |
||||||
|
CONFIG_USEC_PER_TICK=1000 |
||||||
|
CONFIG_USERMAIN_STACKSIZE=2944 |
||||||
|
CONFIG_USER_ENTRYPOINT="nsh_main" |
||||||
|
CONFIG_WATCHDOG=y |
||||||
|
CONFIG_WQUEUE_NOTIFIER=y |
||||||
@ -0,0 +1,215 @@ |
|||||||
|
/**************************************************************************** |
||||||
|
* scripts/script.ld |
||||||
|
* |
||||||
|
* Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. |
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org> |
||||||
|
* |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/* The PX4 FMUV6C uses an STM32H753II has 2048Kb of main FLASH memory. |
||||||
|
* The flash memory is partitioned into a User Flash memory and a System |
||||||
|
* Flash memory. Each of these memories has two banks: |
||||||
|
* |
||||||
|
* 1) User Flash memory: |
||||||
|
* |
||||||
|
* Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each |
||||||
|
* Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each |
||||||
|
* |
||||||
|
* 2) System Flash memory: |
||||||
|
* |
||||||
|
* Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector |
||||||
|
* Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector |
||||||
|
* |
||||||
|
* 3) User option bytes for user configuration, only in Bank 1. |
||||||
|
* |
||||||
|
* In the STM32H743II, two different boot spaces can be selected through |
||||||
|
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and |
||||||
|
* BOOT_ADD1 option bytes: |
||||||
|
* |
||||||
|
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. |
||||||
|
* ST programmed value: Flash memory at 0x0800:0000 |
||||||
|
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. |
||||||
|
* ST programmed value: System bootloader at 0x1FF0:0000 |
||||||
|
* |
||||||
|
* The PX4 FMUV6C has a test point on board, the BOOT0 pin is at ground so by |
||||||
|
* default, the STM32 will boot to address 0x0800:0000 in FLASH unless the test |
||||||
|
* point is pulled to 3.3V.then the boot will be from 0x1FF0:0000 |
||||||
|
* |
||||||
|
* The STM32H743II also has 1024Kb of data SRAM. |
||||||
|
* SRAM is split up into several blocks and into three power domains: |
||||||
|
* |
||||||
|
* 1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with |
||||||
|
* 0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus |
||||||
|
* |
||||||
|
* 1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000 |
||||||
|
* |
||||||
|
* The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit |
||||||
|
* DTCM ports. The DTCM-RAM could be used for critical real-time |
||||||
|
* data, such as interrupt service routines or stack / heap memory. |
||||||
|
* Both DTCM-RAMs can be used in parallel (for load/store operations) |
||||||
|
* thanks to the Cortex-M7 dual issue capability. |
||||||
|
* |
||||||
|
* 1.2) 64Kb of ITCM-RAM beginning at address 0x0000:0000 |
||||||
|
* |
||||||
|
* This RAM is connected to ITCM 64-bit interface designed for |
||||||
|
* execution of critical real-times routines by the CPU. |
||||||
|
* |
||||||
|
* 2) AXI SRAM (D1 domain) accessible by all system masters except BDMA |
||||||
|
* through D1 domain AXI bus matrix |
||||||
|
* |
||||||
|
* 2.1) 512Kb of SRAM beginning at address 0x2400:0000 |
||||||
|
* |
||||||
|
* 3) AHB SRAM (D2 domain) accessible by all system masters except BDMA |
||||||
|
* through D2 domain AHB bus matrix |
||||||
|
* |
||||||
|
* 3.1) 128Kb of SRAM1 beginning at address 0x3000:0000 |
||||||
|
* 3.2) 128Kb of SRAM2 beginning at address 0x3002:0000 |
||||||
|
* 3.3) 32Kb of SRAM3 beginning at address 0x3004:0000 |
||||||
|
* |
||||||
|
* SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000 |
||||||
|
* |
||||||
|
* 4) AHB SRAM (D3 domain) accessible by most of system masters |
||||||
|
* through D3 domain AHB bus matrix |
||||||
|
* |
||||||
|
* 4.1) 64Kb of SRAM4 beginning at address 0x3800:0000 |
||||||
|
* 4.1) 4Kb of backup RAM beginning at address 0x3880:0000 |
||||||
|
* |
||||||
|
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 |
||||||
|
* where the code expects to begin execution by jumping to the entry point in |
||||||
|
* the 0x0800:0000 address range. |
||||||
|
* |
||||||
|
* The bootloader uses the first sector of the flash, which is 128K in length. |
||||||
|
*/ |
||||||
|
|
||||||
|
MEMORY |
||||||
|
{ |
||||||
|
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K |
||||||
|
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K |
||||||
|
dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K |
||||||
|
dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K |
||||||
|
sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K |
||||||
|
sram1 (rwx) : ORIGIN = 0x30000000, LENGTH = 128K |
||||||
|
sram2 (rwx) : ORIGIN = 0x30020000, LENGTH = 128K |
||||||
|
sram3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K |
||||||
|
sram4 (rwx) : ORIGIN = 0x38000000, LENGTH = 64K |
||||||
|
bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K |
||||||
|
} |
||||||
|
|
||||||
|
OUTPUT_ARCH(arm) |
||||||
|
EXTERN(_vectors) |
||||||
|
ENTRY(_stext) |
||||||
|
|
||||||
|
/* |
||||||
|
* Ensure that abort() is present in the final object. The exception handling |
||||||
|
* code pulled in by libgcc.a requires it (and that code cannot be easily avoided). |
||||||
|
*/ |
||||||
|
EXTERN(abort) |
||||||
|
EXTERN(_bootdelay_signature) |
||||||
|
|
||||||
|
SECTIONS |
||||||
|
{ |
||||||
|
.text : { |
||||||
|
_stext = ABSOLUTE(.); |
||||||
|
*(.vectors) |
||||||
|
. = ALIGN(32); |
||||||
|
/* |
||||||
|
This signature provides the bootloader with a way to delay booting |
||||||
|
*/ |
||||||
|
_bootdelay_signature = ABSOLUTE(.); |
||||||
|
FILL(0xffecc2925d7d05c5) |
||||||
|
. += 8; |
||||||
|
*(.text .text.*) |
||||||
|
*(.fixup) |
||||||
|
*(.gnu.warning) |
||||||
|
*(.rodata .rodata.*) |
||||||
|
*(.gnu.linkonce.t.*) |
||||||
|
*(.glue_7) |
||||||
|
*(.glue_7t) |
||||||
|
*(.got) |
||||||
|
*(.gcc_except_table) |
||||||
|
*(.gnu.linkonce.r.*) |
||||||
|
_etext = ABSOLUTE(.); |
||||||
|
|
||||||
|
} > flash |
||||||
|
|
||||||
|
/* |
||||||
|
* Init functions (static constructors and the like) |
||||||
|
*/ |
||||||
|
.init_section : { |
||||||
|
_sinit = ABSOLUTE(.); |
||||||
|
KEEP(*(.init_array .init_array.*)) |
||||||
|
_einit = ABSOLUTE(.); |
||||||
|
} > flash |
||||||
|
|
||||||
|
|
||||||
|
.ARM.extab : { |
||||||
|
*(.ARM.extab*) |
||||||
|
} > flash |
||||||
|
|
||||||
|
__exidx_start = ABSOLUTE(.); |
||||||
|
.ARM.exidx : { |
||||||
|
*(.ARM.exidx*) |
||||||
|
} > flash |
||||||
|
__exidx_end = ABSOLUTE(.); |
||||||
|
|
||||||
|
_eronly = ABSOLUTE(.); |
||||||
|
|
||||||
|
.data : { |
||||||
|
_sdata = ABSOLUTE(.); |
||||||
|
*(.data .data.*) |
||||||
|
*(.gnu.linkonce.d.*) |
||||||
|
CONSTRUCTORS |
||||||
|
_edata = ABSOLUTE(.); |
||||||
|
} > sram AT > flash |
||||||
|
|
||||||
|
.bss : { |
||||||
|
_sbss = ABSOLUTE(.); |
||||||
|
*(.bss .bss.*) |
||||||
|
*(.gnu.linkonce.b.*) |
||||||
|
*(COMMON) |
||||||
|
. = ALIGN(4); |
||||||
|
_ebss = ABSOLUTE(.); |
||||||
|
} > sram |
||||||
|
|
||||||
|
/* Stabs debugging sections. */ |
||||||
|
.stab 0 : { *(.stab) } |
||||||
|
.stabstr 0 : { *(.stabstr) } |
||||||
|
.stab.excl 0 : { *(.stab.excl) } |
||||||
|
.stab.exclstr 0 : { *(.stab.exclstr) } |
||||||
|
.stab.index 0 : { *(.stab.index) } |
||||||
|
.stab.indexstr 0 : { *(.stab.indexstr) } |
||||||
|
.comment 0 : { *(.comment) } |
||||||
|
.debug_abbrev 0 : { *(.debug_abbrev) } |
||||||
|
.debug_info 0 : { *(.debug_info) } |
||||||
|
.debug_line 0 : { *(.debug_line) } |
||||||
|
.debug_pubnames 0 : { *(.debug_pubnames) } |
||||||
|
.debug_aranges 0 : { *(.debug_aranges) } |
||||||
|
} |
||||||
@ -0,0 +1,223 @@ |
|||||||
|
/**************************************************************************** |
||||||
|
* scripts/script.ld |
||||||
|
* |
||||||
|
* Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. |
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org> |
||||||
|
* |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/* The PX4 FMUV6C uses an STM32H753II has 2048Kb of main FLASH memory. |
||||||
|
* The flash memory is partitioned into a User Flash memory and a System |
||||||
|
* Flash memory. Each of these memories has two banks: |
||||||
|
* |
||||||
|
* 1) User Flash memory: |
||||||
|
* |
||||||
|
* Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each |
||||||
|
* Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each |
||||||
|
* |
||||||
|
* 2) System Flash memory: |
||||||
|
* |
||||||
|
* Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector |
||||||
|
* Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector |
||||||
|
* |
||||||
|
* 3) User option bytes for user configuration, only in Bank 1. |
||||||
|
* |
||||||
|
* In the STM32H743II, two different boot spaces can be selected through |
||||||
|
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and |
||||||
|
* BOOT_ADD1 option bytes: |
||||||
|
* |
||||||
|
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. |
||||||
|
* ST programmed value: Flash memory at 0x0800:0000 |
||||||
|
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. |
||||||
|
* ST programmed value: System bootloader at 0x1FF0:0000 |
||||||
|
* |
||||||
|
* The PX4 FMUV6C has a test point on board, the BOOT0 pin is at ground so by |
||||||
|
* default, the STM32 will boot to address 0x0800:0000 in FLASH unless the test |
||||||
|
* point is pulled to 3.3V.then the boot will be from 0x1FF0:0000 |
||||||
|
* |
||||||
|
* The STM32H743II also has 1024Kb of data SRAM. |
||||||
|
* SRAM is split up into several blocks and into three power domains: |
||||||
|
* |
||||||
|
* 1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with |
||||||
|
* 0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus |
||||||
|
* |
||||||
|
* 1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000 |
||||||
|
* |
||||||
|
* The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit |
||||||
|
* DTCM ports. The DTCM-RAM could be used for critical real-time |
||||||
|
* data, such as interrupt service routines or stack / heap memory. |
||||||
|
* Both DTCM-RAMs can be used in parallel (for load/store operations) |
||||||
|
* thanks to the Cortex-M7 dual issue capability. |
||||||
|
* |
||||||
|
* 1.2) 64Kb of ITCM-RAM beginning at address 0x0000:0000 |
||||||
|
* |
||||||
|
* This RAM is connected to ITCM 64-bit interface designed for |
||||||
|
* execution of critical real-times routines by the CPU. |
||||||
|
* |
||||||
|
* 2) AXI SRAM (D1 domain) accessible by all system masters except BDMA |
||||||
|
* through D1 domain AXI bus matrix |
||||||
|
* |
||||||
|
* 2.1) 512Kb of SRAM beginning at address 0x2400:0000 |
||||||
|
* |
||||||
|
* 3) AHB SRAM (D2 domain) accessible by all system masters except BDMA |
||||||
|
* through D2 domain AHB bus matrix |
||||||
|
* |
||||||
|
* 3.1) 128Kb of SRAM1 beginning at address 0x3000:0000 |
||||||
|
* 3.2) 128Kb of SRAM2 beginning at address 0x3002:0000 |
||||||
|
* 3.3) 32Kb of SRAM3 beginning at address 0x3004:0000 |
||||||
|
* |
||||||
|
* SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000 |
||||||
|
* |
||||||
|
* 4) AHB SRAM (D3 domain) accessible by most of system masters |
||||||
|
* through D3 domain AHB bus matrix |
||||||
|
* |
||||||
|
* 4.1) 64Kb of SRAM4 beginning at address 0x3800:0000 |
||||||
|
* 4.1) 4Kb of backup RAM beginning at address 0x3880:0000 |
||||||
|
* |
||||||
|
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 |
||||||
|
* where the code expects to begin execution by jumping to the entry point in |
||||||
|
* the 0x0800:0000 address range. |
||||||
|
*/ |
||||||
|
|
||||||
|
MEMORY |
||||||
|
{ |
||||||
|
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K |
||||||
|
flash (rx) : ORIGIN = 0x08020000, LENGTH = 1920K |
||||||
|
dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K |
||||||
|
dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K |
||||||
|
sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K |
||||||
|
sram1 (rwx) : ORIGIN = 0x30000000, LENGTH = 128K |
||||||
|
sram2 (rwx) : ORIGIN = 0x30020000, LENGTH = 128K |
||||||
|
sram3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K |
||||||
|
sram4 (rwx) : ORIGIN = 0x38000000, LENGTH = 64K |
||||||
|
bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K |
||||||
|
} |
||||||
|
|
||||||
|
OUTPUT_ARCH(arm) |
||||||
|
EXTERN(_vectors) |
||||||
|
ENTRY(_stext) |
||||||
|
|
||||||
|
/* |
||||||
|
* Ensure that abort() is present in the final object. The exception handling |
||||||
|
* code pulled in by libgcc.a requires it (and that code cannot be easily avoided). |
||||||
|
*/ |
||||||
|
EXTERN(abort) |
||||||
|
EXTERN(_bootdelay_signature) |
||||||
|
EXTERN(board_get_manifest) |
||||||
|
|
||||||
|
SECTIONS |
||||||
|
{ |
||||||
|
.text : { |
||||||
|
_stext = ABSOLUTE(.); |
||||||
|
*(.vectors) |
||||||
|
. = ALIGN(32); |
||||||
|
/* |
||||||
|
This signature provides the bootloader with a way to delay booting |
||||||
|
*/ |
||||||
|
_bootdelay_signature = ABSOLUTE(.); |
||||||
|
FILL(0xffecc2925d7d05c5) |
||||||
|
. += 8; |
||||||
|
*(.text .text.*) |
||||||
|
*(.fixup) |
||||||
|
*(.gnu.warning) |
||||||
|
*(.rodata .rodata.*) |
||||||
|
*(.gnu.linkonce.t.*) |
||||||
|
*(.glue_7) |
||||||
|
*(.glue_7t) |
||||||
|
*(.got) |
||||||
|
*(.gcc_except_table) |
||||||
|
*(.gnu.linkonce.r.*) |
||||||
|
_etext = ABSOLUTE(.); |
||||||
|
|
||||||
|
} > flash |
||||||
|
|
||||||
|
/* |
||||||
|
* Init functions (static constructors and the like) |
||||||
|
*/ |
||||||
|
.init_section : { |
||||||
|
_sinit = ABSOLUTE(.); |
||||||
|
KEEP(*(.init_array .init_array.*)) |
||||||
|
_einit = ABSOLUTE(.); |
||||||
|
} > flash |
||||||
|
|
||||||
|
|
||||||
|
.ARM.extab : { |
||||||
|
*(.ARM.extab*) |
||||||
|
} > flash |
||||||
|
|
||||||
|
__exidx_start = ABSOLUTE(.); |
||||||
|
.ARM.exidx : { |
||||||
|
*(.ARM.exidx*) |
||||||
|
} > flash |
||||||
|
__exidx_end = ABSOLUTE(.); |
||||||
|
|
||||||
|
_eronly = ABSOLUTE(.); |
||||||
|
|
||||||
|
.data : { |
||||||
|
_sdata = ABSOLUTE(.); |
||||||
|
*(.data .data.*) |
||||||
|
*(.gnu.linkonce.d.*) |
||||||
|
CONSTRUCTORS |
||||||
|
_edata = ABSOLUTE(.); |
||||||
|
} > sram AT > flash |
||||||
|
|
||||||
|
.bss : { |
||||||
|
_sbss = ABSOLUTE(.); |
||||||
|
*(.bss .bss.*) |
||||||
|
*(.gnu.linkonce.b.*) |
||||||
|
*(COMMON) |
||||||
|
. = ALIGN(4); |
||||||
|
_ebss = ABSOLUTE(.); |
||||||
|
} > sram |
||||||
|
|
||||||
|
/* Emit the the D3 power domain section for locating BDMA data */ |
||||||
|
|
||||||
|
.sram4_reserve (NOLOAD) : |
||||||
|
{ |
||||||
|
*(.sram4) |
||||||
|
. = ALIGN(4); |
||||||
|
_sram4_heap_start = ABSOLUTE(.); |
||||||
|
} > sram4 |
||||||
|
|
||||||
|
/* Stabs debugging sections. */ |
||||||
|
.stab 0 : { *(.stab) } |
||||||
|
.stabstr 0 : { *(.stabstr) } |
||||||
|
.stab.excl 0 : { *(.stab.excl) } |
||||||
|
.stab.exclstr 0 : { *(.stab.exclstr) } |
||||||
|
.stab.index 0 : { *(.stab.index) } |
||||||
|
.stab.indexstr 0 : { *(.stab.indexstr) } |
||||||
|
.comment 0 : { *(.comment) } |
||||||
|
.debug_abbrev 0 : { *(.debug_abbrev) } |
||||||
|
.debug_info 0 : { *(.debug_info) } |
||||||
|
.debug_line 0 : { *(.debug_line) } |
||||||
|
.debug_pubnames 0 : { *(.debug_pubnames) } |
||||||
|
.debug_aranges 0 : { *(.debug_aranges) } |
||||||
|
} |
||||||
@ -0,0 +1,75 @@ |
|||||||
|
############################################################################ |
||||||
|
# |
||||||
|
# Copyright (c) 2016 PX4 Development Team. All rights reserved. |
||||||
|
# |
||||||
|
# Redistribution and use in source and binary forms, with or without |
||||||
|
# modification, are permitted provided that the following conditions |
||||||
|
# are met: |
||||||
|
# |
||||||
|
# 1. Redistributions of source code must retain the above copyright |
||||||
|
# notice, this list of conditions and the following disclaimer. |
||||||
|
# 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
# notice, this list of conditions and the following disclaimer in |
||||||
|
# the documentation and/or other materials provided with the |
||||||
|
# distribution. |
||||||
|
# 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
# used to endorse or promote products derived from this software |
||||||
|
# without specific prior written permission. |
||||||
|
# |
||||||
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
# POSSIBILITY OF SUCH DAMAGE. |
||||||
|
# |
||||||
|
############################################################################ |
||||||
|
if("${PX4_BOARD_LABEL}" STREQUAL "bootloader") |
||||||
|
add_compile_definitions(BOOTLOADER) |
||||||
|
add_library(drivers_board |
||||||
|
bootloader_main.c |
||||||
|
init.c |
||||||
|
usb.c |
||||||
|
timer_config.cpp |
||||||
|
) |
||||||
|
target_link_libraries(drivers_board |
||||||
|
PRIVATE |
||||||
|
nuttx_arch # sdio |
||||||
|
nuttx_drivers # sdio |
||||||
|
px4_layer #gpio |
||||||
|
arch_io_pins # iotimer |
||||||
|
bootloader |
||||||
|
) |
||||||
|
target_include_directories(drivers_board PRIVATE ${PX4_SOURCE_DIR}/platforms/nuttx/src/bootloader/common) |
||||||
|
|
||||||
|
else() |
||||||
|
add_library(drivers_board |
||||||
|
can.c |
||||||
|
i2c.cpp |
||||||
|
init.c |
||||||
|
led.c |
||||||
|
mtd.cpp |
||||||
|
manifest.c |
||||||
|
sdio.c |
||||||
|
spi.cpp |
||||||
|
timer_config.cpp |
||||||
|
usb.c |
||||||
|
) |
||||||
|
add_dependencies(drivers_board arch_board_hw_info) |
||||||
|
|
||||||
|
target_link_libraries(drivers_board |
||||||
|
PRIVATE |
||||||
|
arch_spi |
||||||
|
arch_board_hw_info |
||||||
|
drivers__led # drv_led_start |
||||||
|
nuttx_arch # sdio |
||||||
|
nuttx_drivers # sdio |
||||||
|
px4_layer |
||||||
|
) |
||||||
|
endif() |
||||||
@ -0,0 +1,321 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (c) 2022 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @file board_config.h |
||||||
|
* |
||||||
|
* PX4FMU-v6c internal definitions |
||||||
|
*/ |
||||||
|
|
||||||
|
#pragma once |
||||||
|
|
||||||
|
/****************************************************************************************************
|
||||||
|
* Included Files |
||||||
|
****************************************************************************************************/ |
||||||
|
|
||||||
|
#include <px4_platform_common/px4_config.h> |
||||||
|
#include <nuttx/compiler.h> |
||||||
|
#include <stdint.h> |
||||||
|
|
||||||
|
|
||||||
|
#include <stm32_gpio.h> |
||||||
|
|
||||||
|
/****************************************************************************************************
|
||||||
|
* Definitions |
||||||
|
****************************************************************************************************/ |
||||||
|
|
||||||
|
#undef TRACE_PINS |
||||||
|
|
||||||
|
/* PX4IO connection configuration */ |
||||||
|
|
||||||
|
#define BOARD_USES_PX4IO_VERSION 2 |
||||||
|
#define PX4IO_SERIAL_DEVICE "/dev/ttyS4" |
||||||
|
#define PX4IO_SERIAL_TX_GPIO GPIO_USART6_TX |
||||||
|
#define PX4IO_SERIAL_RX_GPIO GPIO_USART6_RX |
||||||
|
#define PX4IO_SERIAL_BASE STM32_USART6_BASE |
||||||
|
#define PX4IO_SERIAL_VECTOR STM32_IRQ_USART6 |
||||||
|
#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX |
||||||
|
#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX |
||||||
|
#define PX4IO_SERIAL_RCC_REG STM32_RCC_APB2ENR |
||||||
|
#define PX4IO_SERIAL_RCC_EN RCC_APB2ENR_USART6EN |
||||||
|
#define PX4IO_SERIAL_CLOCK STM32_PCLK2_FREQUENCY |
||||||
|
#define PX4IO_SERIAL_BITRATE 1500000 /* 1.5Mbps -> max rate for IO */ |
||||||
|
|
||||||
|
/* PX4FMU GPIOs ***********************************************************************************/ |
||||||
|
|
||||||
|
|
||||||
|
/* LEDs are driven with push pull Anodes to 3.3V */ |
||||||
|
|
||||||
|
#define GPIO_nLED_RED /* PD10 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN10) |
||||||
|
#define GPIO_nLED_BLUE /* PD11 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN11) |
||||||
|
|
||||||
|
#define BOARD_HAS_CONTROL_STATUS_LEDS 1 |
||||||
|
#define BOARD_OVERLOAD_LED LED_RED |
||||||
|
#define BOARD_ARMED_STATE_LED LED_BLUE |
||||||
|
|
||||||
|
/*
|
||||||
|
* ADC channels |
||||||
|
* |
||||||
|
* These are the channel numbers of the ADCs of the microcontroller that |
||||||
|
* can be used by the Px4 Firmware in the adc driver |
||||||
|
*/ |
||||||
|
|
||||||
|
/* ADC defines to be used in sensors.cpp to read from a particular channel */ |
||||||
|
|
||||||
|
#define ADC1_CH(n) (n) |
||||||
|
|
||||||
|
/* N.B. there is no offset mapping needed for ADC3 because */ |
||||||
|
#define ADC3_CH(n) (n) |
||||||
|
|
||||||
|
/* We are only use ADC3 for REV/VER. */ |
||||||
|
|
||||||
|
/* Define GPIO pins used as ADC N.B. Channel numbers must match below */ |
||||||
|
|
||||||
|
#define PX4_ADC_GPIO \ |
||||||
|
/* PC4 */ GPIO_ADC12_INP4, \
|
||||||
|
/* PB1 */ GPIO_ADC12_INP5, \
|
||||||
|
/* PC5 */ GPIO_ADC12_INP8, \
|
||||||
|
/* PC0 */ GPIO_ADC123_INP10, \
|
||||||
|
/* PC1 */ GPIO_ADC123_INP11, \
|
||||||
|
/* PA2 */ GPIO_ADC12_INP14, \
|
||||||
|
/* PA4 */ GPIO_ADC12_INP18 \
|
||||||
|
|
||||||
|
/* Define Channel numbers must match above GPIO pin IN(n)*/ |
||||||
|
#define ADC_BATTERY1_CURRENT_CHANNEL /* PC4 */ ADC1_CH(4) |
||||||
|
#define ADC_BATTERY2_VOLTAGE_CHANNEL /* PB1 */ ADC1_CH(5) |
||||||
|
#define ADC_BATTERY1_VOLTAGE_CHANNEL /* PC5 */ ADC1_CH(8) |
||||||
|
#define ADC_HW_REV_SENSE_CHANNEL /* PC0 */ ADC3_CH(10) |
||||||
|
#define ADC_HW_VER_SENSE_CHANNEL /* PC1 */ ADC3_CH(11) |
||||||
|
#define ADC_BATTERY2_CURRENT_CHANNEL /* PA2 */ ADC1_CH(14) |
||||||
|
#define ADC_SCALED_V5_CHANNEL /* PA4 */ ADC1_CH(18) |
||||||
|
|
||||||
|
#define ADC_CHANNELS \ |
||||||
|
((1 << ADC_BATTERY1_CURRENT_CHANNEL) | \
|
||||||
|
(1 << ADC_BATTERY2_VOLTAGE_CHANNEL) | \
|
||||||
|
(1 << ADC_BATTERY1_VOLTAGE_CHANNEL) | \
|
||||||
|
(1 << ADC_BATTERY2_CURRENT_CHANNEL) | \
|
||||||
|
(1 << ADC_SCALED_V5_CHANNEL )) |
||||||
|
|
||||||
|
#define HW_REV_VER_ADC_BASE STM32_ADC3_BASE |
||||||
|
|
||||||
|
#define SYSTEM_ADC_BASE STM32_ADC1_BASE |
||||||
|
|
||||||
|
/* HW has to large of R termination on ADC todo:change when HW value is chosen */ |
||||||
|
#define BOARD_ADC_OPEN_CIRCUIT_V (5.6f) |
||||||
|
|
||||||
|
/* HW Version and Revision drive signals Default to 1 to detect */ |
||||||
|
#define BOARD_HAS_HW_VERSIONING |
||||||
|
|
||||||
|
#define GPIO_HW_VER_REV_DRIVE /* PE12 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN12) |
||||||
|
#define GPIO_HW_REV_SENSE /* PC0 */ GPIO_ADC123_INP10 |
||||||
|
#define GPIO_HW_VER_SENSE /* PC1 */ GPIO_ADC123_INP11 |
||||||
|
#define HW_INFO_INIT {'V','6','C','x', 'x',0} |
||||||
|
#define HW_INFO_INIT_VER 3 /* Offset in above string of the VER */ |
||||||
|
#define HW_INFO_INIT_REV 4 /* Offset in above string of the REV */ |
||||||
|
|
||||||
|
#define BOARD_NUM_SPI_CFG_HW_VERSIONS 2 // Rev 0, 10 Sensor sets
|
||||||
|
// Base/FMUM
|
||||||
|
#define V6C00 HW_VER_REV(0x0,0x0) // FMUV6C, Rev 0
|
||||||
|
#define V6C10 HW_VER_REV(0x1,0x0) // NO PX4IO, Rev 0
|
||||||
|
|
||||||
|
|
||||||
|
/* HEATER
|
||||||
|
* PWM in future |
||||||
|
*/ |
||||||
|
#define GPIO_HEATER_OUTPUT /* PB9 T17CH1 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9) |
||||||
|
#define HEATER_OUTPUT_EN(on_true) px4_arch_gpiowrite(GPIO_HEATER_OUTPUT, (on_true)) |
||||||
|
|
||||||
|
/* PWM
|
||||||
|
*/ |
||||||
|
#define DIRECT_PWM_OUTPUT_CHANNELS 8 |
||||||
|
|
||||||
|
|
||||||
|
/* Power supply control and monitoring GPIOs */ |
||||||
|
|
||||||
|
#define GPIO_nPOWER_IN_A /* PA15 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTA|GPIO_PIN15) |
||||||
|
#define GPIO_nPOWER_IN_B /* PB12 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTB|GPIO_PIN12) |
||||||
|
#define GPIO_nPOWER_IN_C /* PE15 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN15) |
||||||
|
|
||||||
|
#define GPIO_nVDD_BRICK1_VALID GPIO_nPOWER_IN_A /* Brick 1 Is Chosen */ |
||||||
|
#define GPIO_nVDD_BRICK2_VALID GPIO_nPOWER_IN_B /* Brick 2 Is Chosen */ |
||||||
|
#define BOARD_NUMBER_BRICKS 2 |
||||||
|
#define GPIO_nVDD_USB_VALID GPIO_nPOWER_IN_C /* USB Is Chosen */ |
||||||
|
|
||||||
|
#define GPIO_VDD_5V_PERIPH_nEN /* PE2 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2) |
||||||
|
#define GPIO_VDD_5V_PERIPH_nOC /* PE3 */ (GPIO_INPUT |GPIO_FLOAT|GPIO_PORTE|GPIO_PIN3) |
||||||
|
#define GPIO_VDD_5V_HIPOWER_nEN /* PC10 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN10) |
||||||
|
#define GPIO_VDD_5V_HIPOWER_nOC /* PC11 */ (GPIO_INPUT |GPIO_FLOAT|GPIO_PORTC|GPIO_PIN11) |
||||||
|
#define GPIO_VDD_3V3_SENSORS_EN /* PB2 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN2) |
||||||
|
|
||||||
|
/* Define True logic Power Control in arch agnostic form */ |
||||||
|
|
||||||
|
#define VDD_5V_PERIPH_EN(on_true) px4_arch_gpiowrite(GPIO_VDD_5V_PERIPH_nEN, !(on_true)) |
||||||
|
#define VDD_5V_HIPOWER_EN(on_true) px4_arch_gpiowrite(GPIO_VDD_5V_HIPOWER_nEN, !(on_true)) |
||||||
|
#define VDD_3V3_SENSORS_EN(on_true) px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS4_EN, (on_true)) |
||||||
|
|
||||||
|
/* Tone alarm output */ |
||||||
|
|
||||||
|
#define TONE_ALARM_TIMER 3 /* Timer 3 */ |
||||||
|
#define TONE_ALARM_CHANNEL 3 /* PB0 GPIO_TIM3_CH3OUT_1 */ |
||||||
|
|
||||||
|
#define GPIO_BUZZER_1 /* PPB0 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN0) |
||||||
|
|
||||||
|
#define GPIO_TONE_ALARM_IDLE GPIO_BUZZER_1 |
||||||
|
#define GPIO_TONE_ALARM GPIO_TIM3_CH3OUT_1 |
||||||
|
|
||||||
|
/* USB OTG FS
|
||||||
|
* |
||||||
|
* PA9 OTG_FS_VBUS VBUS sensing |
||||||
|
*/ |
||||||
|
#define GPIO_OTGFS_VBUS /* PA9 */ (GPIO_INPUT|GPIO_PULLDOWN|GPIO_SPEED_100MHz|GPIO_PORTA|GPIO_PIN9) |
||||||
|
|
||||||
|
/* High-resolution timer */ |
||||||
|
#define HRT_TIMER 8 /* use timer8 for the HRT */ |
||||||
|
#define HRT_TIMER_CHANNEL 3 /* use capture/compare channel 3 */ |
||||||
|
|
||||||
|
/* PWM input driver. Use FMU AUX5 pins attached to timer4 channel 3 */ |
||||||
|
#define PWMIN_TIMER 4 |
||||||
|
#define PWMIN_TIMER_CHANNEL /* T4C3 */ 3 |
||||||
|
#define GPIO_PWM_IN /* PD14 */ GPIO_TIM4_CH3IN_2 |
||||||
|
|
||||||
|
#define SDIO_SLOTNO 0 /* Only one slot */ |
||||||
|
#define SDIO_MINOR 0 |
||||||
|
|
||||||
|
/* SD card bringup does not work if performed on the IDLE thread because it
|
||||||
|
* will cause waiting. Use either: |
||||||
|
* |
||||||
|
* CONFIG_LIB_BOARDCTL=y, OR |
||||||
|
* CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y |
||||||
|
*/ |
||||||
|
|
||||||
|
#if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_LIB_BOARDCTL) && \ |
||||||
|
!defined(CONFIG_BOARD_INITTHREAD) |
||||||
|
# warning SDIO initialization cannot be perfomed on the IDLE thread |
||||||
|
#endif |
||||||
|
|
||||||
|
/* By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction)
|
||||||
|
* this board support the ADC system_power interface, and therefore |
||||||
|
* provides the true logic GPIO BOARD_ADC_xxxx macros. |
||||||
|
*/ |
||||||
|
#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS)) |
||||||
|
#define BOARD_ADC_USB_VALID (!px4_arch_gpioread(GPIO_nVDD_USB_VALID)) |
||||||
|
|
||||||
|
/* FMUv6C never powers off the Servo rail */ |
||||||
|
|
||||||
|
#define BOARD_ADC_SERVO_VALID (1) |
||||||
|
|
||||||
|
#define BOARD_ADC_BRICK1_VALID (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID)) |
||||||
|
#define BOARD_ADC_BRICK2_VALID (!px4_arch_gpioread(GPIO_nVDD_BRICK2_VALID)) |
||||||
|
|
||||||
|
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_nOC)) |
||||||
|
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_nOC)) |
||||||
|
|
||||||
|
|
||||||
|
/* This board provides a DMA pool and APIs */ |
||||||
|
#define BOARD_DMA_ALLOC_POOL_SIZE 5120 |
||||||
|
|
||||||
|
/* This board provides the board_on_reset interface */ |
||||||
|
|
||||||
|
#define BOARD_HAS_ON_RESET 1 |
||||||
|
|
||||||
|
#define PX4_GPIO_INIT_LIST { \ |
||||||
|
PX4_ADC_GPIO, \
|
||||||
|
GPIO_HW_VER_REV_DRIVE, \
|
||||||
|
GPIO_CAN1_TX, \
|
||||||
|
GPIO_CAN1_RX, \
|
||||||
|
GPIO_CAN2_TX, \
|
||||||
|
GPIO_CAN2_RX, \
|
||||||
|
GPIO_HEATER_OUTPUT, \
|
||||||
|
GPIO_nPOWER_IN_A, \
|
||||||
|
GPIO_nPOWER_IN_B, \
|
||||||
|
GPIO_nPOWER_IN_C, \
|
||||||
|
GPIO_VDD_5V_PERIPH_nEN, \
|
||||||
|
GPIO_VDD_5V_PERIPH_nOC, \
|
||||||
|
GPIO_VDD_5V_HIPOWER_nEN, \
|
||||||
|
GPIO_VDD_5V_HIPOWER_nOC, \
|
||||||
|
GPIO_VDD_3V3_SENSORS_EN, \
|
||||||
|
GPIO_TONE_ALARM_IDLE, \
|
||||||
|
} |
||||||
|
|
||||||
|
#define BOARD_ENABLE_CONSOLE_BUFFER |
||||||
|
|
||||||
|
#define PX4_I2C_BUS_MTD 4,5 |
||||||
|
|
||||||
|
|
||||||
|
#define BOARD_NUM_IO_TIMERS 5 |
||||||
|
|
||||||
|
__BEGIN_DECLS |
||||||
|
|
||||||
|
/****************************************************************************************************
|
||||||
|
* Public Types |
||||||
|
****************************************************************************************************/ |
||||||
|
|
||||||
|
/****************************************************************************************************
|
||||||
|
* Public data |
||||||
|
****************************************************************************************************/ |
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__ |
||||||
|
|
||||||
|
/****************************************************************************************************
|
||||||
|
* Public Functions |
||||||
|
****************************************************************************************************/ |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: stm32_sdio_initialize |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* Initialize SDIO-based MMC/SD card support |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
int stm32_sdio_initialize(void); |
||||||
|
|
||||||
|
/****************************************************************************************************
|
||||||
|
* Name: stm32_spiinitialize |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* Called to configure SPI chip select GPIO pins for the PX4FMU board. |
||||||
|
* |
||||||
|
****************************************************************************************************/ |
||||||
|
|
||||||
|
extern void stm32_spiinitialize(void); |
||||||
|
|
||||||
|
extern void stm32_usbinitialize(void); |
||||||
|
|
||||||
|
extern void board_peripheral_reset(int ms); |
||||||
|
|
||||||
|
#include <px4_platform_common/board_common.h> |
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */ |
||||||
|
|
||||||
|
__END_DECLS |
||||||
@ -0,0 +1,62 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (c) 2019, 2021 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @file bootloader_main.c |
||||||
|
* |
||||||
|
* FMU-specific early startup code for bootloader |
||||||
|
*/ |
||||||
|
|
||||||
|
#include "board_config.h" |
||||||
|
#include "bl.h" |
||||||
|
|
||||||
|
#include <nuttx/config.h> |
||||||
|
#include <nuttx/board.h> |
||||||
|
#include <chip.h> |
||||||
|
#include <stm32_uart.h> |
||||||
|
#include <arch/board/board.h> |
||||||
|
#include "arm_internal.h" |
||||||
|
#include <px4_platform_common/init.h> |
||||||
|
|
||||||
|
extern int sercon_main(int c, char **argv); |
||||||
|
|
||||||
|
void board_late_initialize(void) |
||||||
|
{ |
||||||
|
sercon_main(0, NULL); |
||||||
|
} |
||||||
|
|
||||||
|
extern void sys_tick_handler(void); |
||||||
|
void board_timerhook(void) |
||||||
|
{ |
||||||
|
sys_tick_handler(); |
||||||
|
} |
||||||
@ -0,0 +1,128 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (C) 2012 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @file px4fmu_can.c |
||||||
|
* |
||||||
|
* Board-specific CAN functions. |
||||||
|
*/ |
||||||
|
|
||||||
|
#ifdef CONFIG_CAN |
||||||
|
|
||||||
|
#include <errno.h> |
||||||
|
#include <debug.h> |
||||||
|
|
||||||
|
#include <nuttx/can/can.h> |
||||||
|
#include <arch/board/board.h> |
||||||
|
|
||||||
|
#include "chip.h" |
||||||
|
#include "arm_arch.h" |
||||||
|
|
||||||
|
#include "chip.h" |
||||||
|
#include "stm32_can.h" |
||||||
|
#include "board_config.h" |
||||||
|
|
||||||
|
#ifdef CONFIG_CAN |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Pre-processor Definitions |
||||||
|
************************************************************************************/ |
||||||
|
/* Configuration ********************************************************************/ |
||||||
|
|
||||||
|
#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) |
||||||
|
# warning "Both CAN1 and CAN2 are enabled. Assuming only CAN1." |
||||||
|
# undef CONFIG_STM32_CAN2 |
||||||
|
#endif |
||||||
|
|
||||||
|
#ifdef CONFIG_STM32_CAN1 |
||||||
|
# define CAN_PORT 1 |
||||||
|
#else |
||||||
|
# define CAN_PORT 2 |
||||||
|
#endif |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Private Functions |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Functions |
||||||
|
************************************************************************************/ |
||||||
|
int can_devinit(void); |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: can_devinit |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* All STM32 architectures must provide the following interface to work with |
||||||
|
* examples/can. |
||||||
|
* |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
int can_devinit(void) |
||||||
|
{ |
||||||
|
static bool initialized = false; |
||||||
|
struct can_dev_s *can; |
||||||
|
int ret; |
||||||
|
|
||||||
|
/* Check if we have already initialized */ |
||||||
|
|
||||||
|
if (!initialized) { |
||||||
|
/* Call stm32_caninitialize() to get an instance of the CAN interface */ |
||||||
|
|
||||||
|
can = stm32_caninitialize(CAN_PORT); |
||||||
|
|
||||||
|
if (can == NULL) { |
||||||
|
canerr("ERROR: Failed to get CAN interface\n"); |
||||||
|
return -ENODEV; |
||||||
|
} |
||||||
|
|
||||||
|
/* Register the CAN driver at "/dev/can0" */ |
||||||
|
|
||||||
|
ret = can_register("/dev/can0", can); |
||||||
|
|
||||||
|
if (ret < 0) { |
||||||
|
canerr("ERROR: can_register failed: %d\n", ret); |
||||||
|
return ret; |
||||||
|
} |
||||||
|
|
||||||
|
/* Now we are initialized */ |
||||||
|
|
||||||
|
initialized = true; |
||||||
|
} |
||||||
|
|
||||||
|
return OK; |
||||||
|
} |
||||||
|
|
||||||
|
#endif |
||||||
|
|
||||||
|
#endif /* CONFIG_CAN */ |
||||||
@ -0,0 +1,128 @@ |
|||||||
|
/*
|
||||||
|
* hw_config.h |
||||||
|
* |
||||||
|
* Created on: May 17, 2015 |
||||||
|
* Author: david_s5 |
||||||
|
*/ |
||||||
|
|
||||||
|
#ifndef HW_CONFIG_H_ |
||||||
|
#define HW_CONFIG_H_ |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* 10-8--2016: |
||||||
|
* To simplify the ripple effect on the tools, we will be using |
||||||
|
* /dev/serial/by-id/<asterisk>PX4<asterisk> to locate PX4 devices. Therefore |
||||||
|
* moving forward all Bootloaders must contain the prefix "PX4 BL " |
||||||
|
* in the USBDEVICESTRING |
||||||
|
* This Change will be made in an upcoming BL release |
||||||
|
****************************************************************************/ |
||||||
|
/*
|
||||||
|
* Define usage to configure a bootloader |
||||||
|
* |
||||||
|
* |
||||||
|
* Constant example Usage |
||||||
|
* APP_LOAD_ADDRESS 0x08004000 - The address in Linker Script, where the app fw is org-ed |
||||||
|
* BOOTLOADER_DELAY 5000 - Ms to wait while under USB pwr or bootloader request |
||||||
|
* BOARD_FMUV2 |
||||||
|
* INTERFACE_USB 1 - (Optional) Scan and use the USB interface for bootloading |
||||||
|
* INTERFACE_USART 1 - (Optional) Scan and use the Serial interface for bootloading |
||||||
|
* USBDEVICESTRING "PX4 BL FMU v2.x" - USB id string |
||||||
|
* USBPRODUCTID 0x0011 - PID Should match defconfig |
||||||
|
* BOOT_DELAY_ADDRESS 0x000001a0 - (Optional) From the linker script from Linker Script to get a custom |
||||||
|
* delay provided by an APP FW |
||||||
|
* BOARD_TYPE 9 - Must match .prototype boad_id |
||||||
|
* _FLASH_KBYTES (*(uint16_t *)0x1fff7a22) - Run time flash size detection |
||||||
|
* BOARD_FLASH_SECTORS ((_FLASH_KBYTES == 0x400) ? 11 : 23) - Run time determine the physical last sector |
||||||
|
* BOARD_FLASH_SECTORS 11 - Hard coded zero based last sector |
||||||
|
* BOARD_FLASH_SIZE (_FLASH_KBYTES*1024)- Total Flash size of device, determined at run time. |
||||||
|
* (1024 * 1024) - Hard coded Total Flash of device - The bootloader and app reserved will be deducted |
||||||
|
* programmatically |
||||||
|
* |
||||||
|
* BOARD_FIRST_FLASH_SECTOR_TO_ERASE 2 - Optional sectors index in the flash_sectors table (F4 only), to begin erasing. |
||||||
|
* This is to allow sectors to be reserved for app fw usage. That will NOT be erased |
||||||
|
* during a FW upgrade. |
||||||
|
* The default is 0, and selects the first sector to be erased, as the 0th entry in the |
||||||
|
* flash_sectors table. Which is the second physical sector of FLASH in the device. |
||||||
|
* The first physical sector of FLASH is used by the bootloader, and is not defined |
||||||
|
* in the table. |
||||||
|
* |
||||||
|
* APP_RESERVATION_SIZE (BOARD_FIRST_FLASH_SECTOR_TO_ERASE * 16 * 1024) - Number of bytes reserved by the APP FW. This number plus |
||||||
|
* BOOTLOADER_RESERVATION_SIZE will be deducted from |
||||||
|
* BOARD_FLASH_SIZE to determine the size of the App FW |
||||||
|
* and hence the address space of FLASH to erase and program. |
||||||
|
* USBMFGSTRING "PX4 AP" - Optional USB MFG string (default is '3D Robotics' if not defined.) |
||||||
|
* SERIAL_BREAK_DETECT_DISABLED - Optional prevent break selection on Serial port from entering or staying in BL |
||||||
|
* |
||||||
|
* * Other defines are somewhat self explanatory. |
||||||
|
*/ |
||||||
|
|
||||||
|
/* Boot device selection list*/ |
||||||
|
#define USB0_DEV 0x01 |
||||||
|
#define SERIAL0_DEV 0x02 |
||||||
|
#define SERIAL1_DEV 0x04 |
||||||
|
|
||||||
|
#define APP_LOAD_ADDRESS 0x08020000 |
||||||
|
#define BOOTLOADER_DELAY 5000 |
||||||
|
#define INTERFACE_USB 1 |
||||||
|
#define INTERFACE_USB_CONFIG "/dev/ttyACM0" |
||||||
|
#define BOARD_VBUS MK_GPIO_INPUT(GPIO_OTGFS_VBUS) |
||||||
|
|
||||||
|
//#define USE_VBUS_PULL_DOWN
|
||||||
|
#define INTERFACE_USART 1 |
||||||
|
#define INTERFACE_USART_CONFIG "/dev/ttyS0,115200" |
||||||
|
#define BOOT_DELAY_ADDRESS 0x000001a0 |
||||||
|
#define BOARD_TYPE 56 |
||||||
|
#define _FLASH_KBYTES (*(uint32_t *)0x1FF1E880) |
||||||
|
#define BOARD_FLASH_SECTORS (15) |
||||||
|
#define BOARD_FLASH_SIZE (_FLASH_KBYTES * 1024) |
||||||
|
|
||||||
|
#define OSC_FREQ 16 |
||||||
|
|
||||||
|
#define BOARD_PIN_LED_ACTIVITY GPIO_nLED_BLUE // BLUE
|
||||||
|
#define BOARD_PIN_LED_BOOTLOADER GPIO_nLED_RED // RED
|
||||||
|
#define BOARD_LED_ON 0 |
||||||
|
#define BOARD_LED_OFF 1 |
||||||
|
|
||||||
|
#define SERIAL_BREAK_DETECT_DISABLED 1 |
||||||
|
|
||||||
|
/*
|
||||||
|
* Uncommenting this allows to force the bootloader through |
||||||
|
* a PWM output pin. As this can accidentally initialize |
||||||
|
* an ESC prematurely, it is not recommended. This feature |
||||||
|
* has not been used and hence defaults now to off. |
||||||
|
* |
||||||
|
* # define BOARD_FORCE_BL_PIN_OUT (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN14) |
||||||
|
* # define BOARD_FORCE_BL_PIN_IN (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN11) |
||||||
|
* |
||||||
|
* # define BOARD_POWER_PIN_OUT (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) |
||||||
|
* # define BOARD_POWER_ON 1 |
||||||
|
* # define BOARD_POWER_OFF 0 |
||||||
|
* # undef BOARD_POWER_PIN_RELEASE // Leave pin enabling Power - un comment to release (disable power)
|
||||||
|
* |
||||||
|
*/ |
||||||
|
|
||||||
|
#if !defined(ARCH_SN_MAX_LENGTH) |
||||||
|
# define ARCH_SN_MAX_LENGTH 12 |
||||||
|
#endif |
||||||
|
|
||||||
|
#if !defined(APP_RESERVATION_SIZE) |
||||||
|
# define APP_RESERVATION_SIZE 0 |
||||||
|
#endif |
||||||
|
|
||||||
|
#if !defined(BOARD_FIRST_FLASH_SECTOR_TO_ERASE) |
||||||
|
# define BOARD_FIRST_FLASH_SECTOR_TO_ERASE 1 |
||||||
|
#endif |
||||||
|
|
||||||
|
#if !defined(USB_DATA_ALIGN) |
||||||
|
# define USB_DATA_ALIGN |
||||||
|
#endif |
||||||
|
|
||||||
|
#ifndef BOOT_DEVICES_SELECTION |
||||||
|
# define BOOT_DEVICES_SELECTION USB0_DEV|SERIAL0_DEV|SERIAL1_DEV |
||||||
|
#endif |
||||||
|
|
||||||
|
#ifndef BOOT_DEVICES_FILTER_ONUSB |
||||||
|
# define BOOT_DEVICES_FILTER_ONUSB USB0_DEV|SERIAL0_DEV|SERIAL1_DEV |
||||||
|
#endif |
||||||
|
|
||||||
|
#endif /* HW_CONFIG_H_ */ |
||||||
@ -0,0 +1,40 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (C) 2020 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
#include <px4_arch/i2c_hw_description.h> |
||||||
|
|
||||||
|
constexpr px4_i2c_bus_t px4_i2c_buses[I2C_BUS_MAX_BUS_ITEMS] = { |
||||||
|
initI2CBusExternal(1), |
||||||
|
initI2CBusExternal(2), |
||||||
|
initI2CBusInternal(4), |
||||||
|
}; |
||||||
@ -0,0 +1,259 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (c) 2012-2022 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @file init.c |
||||||
|
* |
||||||
|
* PX4FMU-specific early startup code. This file implements the |
||||||
|
* board_app_initialize() function that is called early by nsh during startup. |
||||||
|
* |
||||||
|
* Code here is run before the rcS script is invoked; it should start required |
||||||
|
* subsystems and perform board-specific initialization. |
||||||
|
*/ |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
#include "board_config.h" |
||||||
|
|
||||||
|
#include <stdbool.h> |
||||||
|
#include <stdio.h> |
||||||
|
#include <string.h> |
||||||
|
#include <debug.h> |
||||||
|
#include <errno.h> |
||||||
|
#include <syslog.h> |
||||||
|
|
||||||
|
#include <nuttx/config.h> |
||||||
|
#include <nuttx/board.h> |
||||||
|
#include <nuttx/spi/spi.h> |
||||||
|
#include <nuttx/sdio.h> |
||||||
|
#include <nuttx/mmcsd.h> |
||||||
|
#include <nuttx/analog/adc.h> |
||||||
|
#include <nuttx/mm/gran.h> |
||||||
|
#include <chip.h> |
||||||
|
#include <stm32_uart.h> |
||||||
|
#include <arch/board/board.h> |
||||||
|
#include "arm_internal.h" |
||||||
|
|
||||||
|
#include <drivers/drv_hrt.h> |
||||||
|
#include <drivers/drv_board_led.h> |
||||||
|
#include <systemlib/px4_macros.h> |
||||||
|
#include <px4_arch/io_timer.h> |
||||||
|
#include <px4_platform_common/init.h> |
||||||
|
#include <px4_platform/gpio.h> |
||||||
|
#include <px4_platform/board_determine_hw_info.h> |
||||||
|
#include <px4_platform/board_dma_alloc.h> |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-Processor Definitions |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/* Configuration ************************************************************/ |
||||||
|
|
||||||
|
/*
|
||||||
|
* Ideally we'd be able to get these from arm_internal.h, |
||||||
|
* but since we want to be able to disable the NuttX use |
||||||
|
* of leds for system indication at will and there is no |
||||||
|
* separate switch, we need to build independent of the |
||||||
|
* CONFIG_ARCH_LEDS configuration switch. |
||||||
|
*/ |
||||||
|
__BEGIN_DECLS |
||||||
|
extern void led_init(void); |
||||||
|
extern void led_on(int led); |
||||||
|
extern void led_off(int led); |
||||||
|
__END_DECLS |
||||||
|
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: board_peripheral_reset |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* |
||||||
|
************************************************************************************/ |
||||||
|
__EXPORT void board_peripheral_reset(int ms) |
||||||
|
{ |
||||||
|
/* set the peripheral rails off */ |
||||||
|
|
||||||
|
VDD_5V_PERIPH_EN(false); |
||||||
|
board_control_spi_sensors_power(false, 0xffff); |
||||||
|
|
||||||
|
/* wait for the peripheral rail to reach GND */ |
||||||
|
usleep(ms * 1000); |
||||||
|
syslog(LOG_DEBUG, "reset done, %d ms\n", ms); |
||||||
|
|
||||||
|
/* re-enable power */ |
||||||
|
|
||||||
|
/* switch the peripheral rail back on */ |
||||||
|
board_control_spi_sensors_power(true, 0xffff); |
||||||
|
VDD_5V_PERIPH_EN(true); |
||||||
|
|
||||||
|
} |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: board_on_reset |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* Optionally provided function called on entry to board_system_reset |
||||||
|
* It should perform any house keeping prior to the rest. |
||||||
|
* |
||||||
|
* status - 1 if resetting to boot loader |
||||||
|
* 0 if just resetting |
||||||
|
* |
||||||
|
************************************************************************************/ |
||||||
|
__EXPORT void board_on_reset(int status) |
||||||
|
{ |
||||||
|
for (int i = 0; i < DIRECT_PWM_OUTPUT_CHANNELS; ++i) { |
||||||
|
px4_arch_configgpio(io_timer_channel_get_gpio_output(i)); |
||||||
|
} |
||||||
|
|
||||||
|
if (status >= 0) { |
||||||
|
up_mdelay(6); |
||||||
|
} |
||||||
|
} |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: stm32_boardinitialize |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* All STM32 architectures must provide the following entry point. This entry point |
||||||
|
* is called early in the initialization -- after all memory has been configured |
||||||
|
* and mapped but before any devices have been initialized. |
||||||
|
* |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
__EXPORT void |
||||||
|
stm32_boardinitialize(void) |
||||||
|
{ |
||||||
|
board_on_reset(-1); /* Reset PWM first thing */ |
||||||
|
|
||||||
|
/* configure LEDs */ |
||||||
|
|
||||||
|
board_autoled_initialize(); |
||||||
|
|
||||||
|
/* configure pins */ |
||||||
|
|
||||||
|
const uint32_t gpio[] = PX4_GPIO_INIT_LIST; |
||||||
|
px4_gpio_init(gpio, arraySize(gpio)); |
||||||
|
|
||||||
|
/* configure USB interfaces */ |
||||||
|
|
||||||
|
stm32_usbinitialize(); |
||||||
|
} |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: board_app_initialize |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* Perform application specific initialization. This function is never |
||||||
|
* called directly from application code, but only indirectly via the |
||||||
|
* (non-standard) boardctl() interface using the command BOARDIOC_INIT. |
||||||
|
* |
||||||
|
* Input Parameters: |
||||||
|
* arg - The boardctl() argument is passed to the board_app_initialize() |
||||||
|
* implementation without modification. The argument has no |
||||||
|
* meaning to NuttX; the meaning of the argument is a contract |
||||||
|
* between the board-specific initalization logic and the the |
||||||
|
* matching application logic. The value cold be such things as a |
||||||
|
* mode enumeration value, a set of DIP switch switch settings, a |
||||||
|
* pointer to configuration data read from a file or serial FLASH, |
||||||
|
* or whatever you would like to do with it. Every implementation |
||||||
|
* should accept zero/NULL as a default configuration. |
||||||
|
* |
||||||
|
* Returned Value: |
||||||
|
* Zero (OK) is returned on success; a negated errno value is returned on |
||||||
|
* any failure to indicate the nature of the failure. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
__EXPORT int board_app_initialize(uintptr_t arg) |
||||||
|
{ |
||||||
|
#if !defined(BOOTLOADER) |
||||||
|
|
||||||
|
/* Power on Interfaces */ |
||||||
|
VDD_5V_PERIPH_EN(true); |
||||||
|
VDD_5V_HIPOWER_EN(true); |
||||||
|
|
||||||
|
/* Need hrt running before using the ADC */ |
||||||
|
|
||||||
|
px4_platform_init(); |
||||||
|
|
||||||
|
|
||||||
|
if (OK == board_determine_hw_info()) { |
||||||
|
syslog(LOG_INFO, "[boot] Rev 0x%1x : Ver 0x%1x %s\n", board_get_hw_revision(), board_get_hw_version(), |
||||||
|
board_get_hw_type_name()); |
||||||
|
|
||||||
|
} else { |
||||||
|
syslog(LOG_ERR, "[boot] Failed to read HW revision and version\n"); |
||||||
|
} |
||||||
|
|
||||||
|
stm32_spiinitialize(); |
||||||
|
|
||||||
|
board_spi_reset(10, 0xffff); |
||||||
|
|
||||||
|
/* configure the DMA allocator */ |
||||||
|
|
||||||
|
if (board_dma_alloc_init() < 0) { |
||||||
|
syslog(LOG_ERR, "[boot] DMA alloc FAILED\n"); |
||||||
|
} |
||||||
|
|
||||||
|
# if defined(SERIAL_HAVE_RXDMA) |
||||||
|
// set up the serial DMA polling at 1ms intervals for received bytes that have not triggered a DMA event.
|
||||||
|
static struct hrt_call serial_dma_call; |
||||||
|
hrt_call_every(&serial_dma_call, 1000, 1000, (hrt_callout)stm32_serial_dma_poll, NULL); |
||||||
|
# endif |
||||||
|
|
||||||
|
/* initial LED state */ |
||||||
|
drv_led_start(); |
||||||
|
led_off(LED_RED); |
||||||
|
led_off(LED_BLUE); |
||||||
|
|
||||||
|
if (board_hardfault_init(2, true) != 0) { |
||||||
|
led_on(LED_RED); |
||||||
|
} |
||||||
|
|
||||||
|
# ifdef CONFIG_MMCSD |
||||||
|
int ret = stm32_sdio_initialize(); |
||||||
|
|
||||||
|
if (ret != OK) { |
||||||
|
led_on(LED_RED); |
||||||
|
} |
||||||
|
|
||||||
|
# endif /* CONFIG_MMCSD */ |
||||||
|
|
||||||
|
/* Configure the HW based on the manifest */ |
||||||
|
|
||||||
|
px4_platform_configure(); |
||||||
|
#endif |
||||||
|
return OK; |
||||||
|
} |
||||||
@ -0,0 +1,235 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (c) 2013 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @file px4fmu2_led.c |
||||||
|
* |
||||||
|
* PX4FMU LED backend. |
||||||
|
*/ |
||||||
|
|
||||||
|
#include <px4_platform_common/px4_config.h> |
||||||
|
|
||||||
|
#include <stdbool.h> |
||||||
|
|
||||||
|
#include "chip.h" |
||||||
|
#include "stm32_gpio.h" |
||||||
|
#include "board_config.h" |
||||||
|
|
||||||
|
#include <nuttx/board.h> |
||||||
|
#include <arch/board/board.h> |
||||||
|
|
||||||
|
/*
|
||||||
|
* Ideally we'd be able to get these from arm_internal.h, |
||||||
|
* but since we want to be able to disable the NuttX use |
||||||
|
* of leds for system indication at will and there is no |
||||||
|
* separate switch, we need to build independent of the |
||||||
|
* CONFIG_ARCH_LEDS configuration switch. |
||||||
|
*/ |
||||||
|
__BEGIN_DECLS |
||||||
|
extern void led_init(void); |
||||||
|
extern void led_on(int led); |
||||||
|
extern void led_off(int led); |
||||||
|
extern void led_toggle(int led); |
||||||
|
__END_DECLS |
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_LEDS |
||||||
|
static bool nuttx_owns_leds = true; |
||||||
|
// B R S G
|
||||||
|
// 0 1 2 3
|
||||||
|
static const uint8_t xlatpx4[] = {1, 2, 4, 0}; |
||||||
|
# define xlat(p) xlatpx4[(p)] |
||||||
|
static uint32_t g_ledmap[] = { |
||||||
|
GPIO_nLED_GREEN, // Indexed by BOARD_LED_GREEN
|
||||||
|
GPIO_nLED_BLUE, // Indexed by BOARD_LED_BLUE
|
||||||
|
GPIO_nLED_RED, // Indexed by BOARD_LED_RED
|
||||||
|
GPIO_nSAFETY_SWITCH_LED_OUT, // Indexed by LED_SAFETY by xlatpx4
|
||||||
|
}; |
||||||
|
|
||||||
|
#else |
||||||
|
|
||||||
|
# define xlat(p) (p) |
||||||
|
static uint32_t g_ledmap[] = { |
||||||
|
GPIO_nLED_BLUE, // Indexed by LED_BLUE
|
||||||
|
GPIO_nLED_RED, // Indexed by LED_RED, LED_AMBER
|
||||||
|
0, // Indexed by LED_SAFETY (defaulted to an input)
|
||||||
|
0, // Indexed by LED_GREEN
|
||||||
|
}; |
||||||
|
|
||||||
|
#endif |
||||||
|
|
||||||
|
__EXPORT void led_init(void) |
||||||
|
{ |
||||||
|
for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) { |
||||||
|
if (g_ledmap[l] != 0) { |
||||||
|
stm32_configgpio(g_ledmap[l]); |
||||||
|
} |
||||||
|
} |
||||||
|
} |
||||||
|
|
||||||
|
static void phy_set_led(int led, bool state) |
||||||
|
{ |
||||||
|
/* Drive Low to switch on */ |
||||||
|
|
||||||
|
if (g_ledmap[led] != 0) { |
||||||
|
stm32_gpiowrite(g_ledmap[led], !state); |
||||||
|
} |
||||||
|
} |
||||||
|
|
||||||
|
static bool phy_get_led(int led) |
||||||
|
{ |
||||||
|
/* If Low it is on */ |
||||||
|
if (g_ledmap[led] != 0) { |
||||||
|
return !stm32_gpioread(g_ledmap[led]); |
||||||
|
} |
||||||
|
|
||||||
|
return false; |
||||||
|
} |
||||||
|
|
||||||
|
__EXPORT void led_on(int led) |
||||||
|
{ |
||||||
|
phy_set_led(xlat(led), true); |
||||||
|
} |
||||||
|
|
||||||
|
__EXPORT void led_off(int led) |
||||||
|
{ |
||||||
|
phy_set_led(xlat(led), false); |
||||||
|
} |
||||||
|
|
||||||
|
__EXPORT void led_toggle(int led) |
||||||
|
{ |
||||||
|
phy_set_led(xlat(led), !phy_get_led(xlat(led))); |
||||||
|
} |
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_LEDS |
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: board_autoled_initialize |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
void board_autoled_initialize(void) |
||||||
|
{ |
||||||
|
led_init(); |
||||||
|
} |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: board_autoled_on |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
void board_autoled_on(int led) |
||||||
|
{ |
||||||
|
if (!nuttx_owns_leds) { |
||||||
|
return; |
||||||
|
} |
||||||
|
|
||||||
|
switch (led) { |
||||||
|
default: |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_HEAPALLOCATE: |
||||||
|
phy_set_led(BOARD_LED_BLUE, true); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_IRQSENABLED: |
||||||
|
phy_set_led(BOARD_LED_BLUE, false); |
||||||
|
phy_set_led(BOARD_LED_GREEN, true); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_STACKCREATED: |
||||||
|
phy_set_led(BOARD_LED_GREEN, true); |
||||||
|
phy_set_led(BOARD_LED_BLUE, true); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_INIRQ: |
||||||
|
phy_set_led(BOARD_LED_BLUE, true); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_SIGNAL: |
||||||
|
phy_set_led(BOARD_LED_GREEN, true); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_ASSERTION: |
||||||
|
phy_set_led(BOARD_LED_RED, true); |
||||||
|
phy_set_led(BOARD_LED_BLUE, true); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_PANIC: |
||||||
|
phy_set_led(BOARD_LED_RED, true); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_IDLE : /* IDLE */ |
||||||
|
phy_set_led(BOARD_LED_RED, true); |
||||||
|
break; |
||||||
|
} |
||||||
|
} |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: board_autoled_off |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
void board_autoled_off(int led) |
||||||
|
{ |
||||||
|
if (!nuttx_owns_leds) { |
||||||
|
return; |
||||||
|
} |
||||||
|
|
||||||
|
switch (led) { |
||||||
|
default: |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_SIGNAL: |
||||||
|
phy_set_led(BOARD_LED_GREEN, false); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_INIRQ: |
||||||
|
phy_set_led(BOARD_LED_BLUE, false); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_ASSERTION: |
||||||
|
phy_set_led(BOARD_LED_RED, false); |
||||||
|
phy_set_led(BOARD_LED_BLUE, false); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_PANIC: |
||||||
|
phy_set_led(BOARD_LED_RED, false); |
||||||
|
break; |
||||||
|
|
||||||
|
case LED_IDLE : /* IDLE */ |
||||||
|
phy_set_led(BOARD_LED_RED, false); |
||||||
|
break; |
||||||
|
} |
||||||
|
} |
||||||
|
|
||||||
|
#endif /* CONFIG_ARCH_LEDS */ |
||||||
@ -0,0 +1,147 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (c) 2018, 2021 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @file manifest.c |
||||||
|
* |
||||||
|
* This module supplies the interface to the manifest of hardware that is |
||||||
|
* optional and dependent on the HW REV and HW VER IDs |
||||||
|
* |
||||||
|
* The manifest allows the system to know whether a hardware option |
||||||
|
* say for example the PX4IO is an no-pop option vs it is broken. |
||||||
|
* |
||||||
|
*/ |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
#include <nuttx/config.h> |
||||||
|
#include <board_config.h> |
||||||
|
|
||||||
|
#include <inttypes.h> |
||||||
|
#include <stdbool.h> |
||||||
|
#include <syslog.h> |
||||||
|
|
||||||
|
#include "systemlib/px4_macros.h" |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-Processor Definitions |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
typedef struct { |
||||||
|
uint32_t hw_ver_rev; /* the version and revision */ |
||||||
|
const px4_hw_mft_item_t *mft; /* The first entry */ |
||||||
|
uint32_t entries; /* the lenght of the list */ |
||||||
|
} px4_hw_mft_list_entry_t; |
||||||
|
|
||||||
|
typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry; |
||||||
|
#define px4_hw_mft_list_uninitialized (px4_hw_mft_list_entry) -1 |
||||||
|
|
||||||
|
static const px4_hw_mft_item_t device_unsupported = {0, 0, 0}; |
||||||
|
|
||||||
|
// List of components on a specific board configuration
|
||||||
|
// The index of those components is given by the enum (px4_hw_mft_item_id_t)
|
||||||
|
// declared in board_common.h
|
||||||
|
static const px4_hw_mft_item_t hw_mft_list_v0600[] = { |
||||||
|
{ |
||||||
|
.present = 1, |
||||||
|
.mandatory = 1, |
||||||
|
.connection = px4_hw_con_onboard, |
||||||
|
}, |
||||||
|
}; |
||||||
|
|
||||||
|
static const px4_hw_mft_item_t hw_mft_list_v0610[] = { |
||||||
|
{ |
||||||
|
.present = 0, |
||||||
|
.mandatory = 0, |
||||||
|
.connection = px4_hw_con_unknown, |
||||||
|
}, |
||||||
|
{ |
||||||
|
.present = 1, |
||||||
|
.mandatory = 1, |
||||||
|
.connection = px4_hw_con_onboard, |
||||||
|
}, |
||||||
|
}; |
||||||
|
|
||||||
|
|
||||||
|
static px4_hw_mft_list_entry_t mft_lists[] = { |
||||||
|
// ver_rev
|
||||||
|
{V6C00, hw_mft_list_v0600, arraySize(hw_mft_list_v0600)}, |
||||||
|
{V6C10, hw_mft_list_v0610, arraySize(hw_mft_list_v0610)}, // No PX4IO
|
||||||
|
}; |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: board_query_manifest |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* Optional returns manifest item. |
||||||
|
* |
||||||
|
* Input Parameters: |
||||||
|
* manifest_id - the ID for the manifest item to retrieve |
||||||
|
* |
||||||
|
* Returned Value: |
||||||
|
* 0 - item is not in manifest => assume legacy operations |
||||||
|
* pointer to a manifest item |
||||||
|
* |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
__EXPORT px4_hw_mft_item board_query_manifest(px4_hw_mft_item_id_t id) |
||||||
|
{ |
||||||
|
static px4_hw_mft_list_entry boards_manifest = px4_hw_mft_list_uninitialized; |
||||||
|
|
||||||
|
if (boards_manifest == px4_hw_mft_list_uninitialized) { |
||||||
|
uint32_t ver_rev = board_get_hw_version() << 8; |
||||||
|
ver_rev |= board_get_hw_revision(); |
||||||
|
|
||||||
|
for (unsigned i = 0; i < arraySize(mft_lists); i++) { |
||||||
|
if (mft_lists[i].hw_ver_rev == ver_rev) { |
||||||
|
boards_manifest = &mft_lists[i]; |
||||||
|
break; |
||||||
|
} |
||||||
|
} |
||||||
|
|
||||||
|
if (boards_manifest == px4_hw_mft_list_uninitialized) { |
||||||
|
syslog(LOG_ERR, "[boot] Board %4" PRIx32 " is not supported!\n", ver_rev); |
||||||
|
} |
||||||
|
} |
||||||
|
|
||||||
|
px4_hw_mft_item rv = &device_unsupported; |
||||||
|
|
||||||
|
if (boards_manifest != px4_hw_mft_list_uninitialized && |
||||||
|
id < boards_manifest->entries) { |
||||||
|
rv = &boards_manifest->mft[id]; |
||||||
|
} |
||||||
|
|
||||||
|
return rv; |
||||||
|
} |
||||||
@ -0,0 +1,104 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (C) 2020 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
#include <nuttx/spi/spi.h> |
||||||
|
#include <px4_platform_common/px4_manifest.h> |
||||||
|
// KiB BS nB
|
||||||
|
static const px4_mft_device_t spi2 = { // FM25V02A on FMUM 32K 512 X 64
|
||||||
|
.bus_type = px4_mft_device_t::SPI, |
||||||
|
.devid = SPIDEV_FLASH(0) |
||||||
|
}; |
||||||
|
|
||||||
|
static const px4_mft_device_t i2c4 = { // 24LC64T on IMU 8K 32 X 256
|
||||||
|
.bus_type = px4_mft_device_t::I2C, |
||||||
|
.devid = PX4_MK_I2C_DEVID(4, 0x50) |
||||||
|
}; |
||||||
|
|
||||||
|
|
||||||
|
static const px4_mtd_entry_t fmum_fram = { |
||||||
|
.device = &spi2, |
||||||
|
.npart = 2, |
||||||
|
.partd = { |
||||||
|
{ |
||||||
|
.type = MTD_PARAMETERS, |
||||||
|
.path = "/fs/mtd_params", |
||||||
|
.nblocks = 32 |
||||||
|
}, |
||||||
|
{ |
||||||
|
.type = MTD_WAYPOINTS, |
||||||
|
.path = "/fs/mtd_waypoints", |
||||||
|
.nblocks = 32 |
||||||
|
|
||||||
|
} |
||||||
|
}, |
||||||
|
}; |
||||||
|
|
||||||
|
static const px4_mtd_entry_t imu_eeprom = { |
||||||
|
.device = &i2c4, |
||||||
|
.npart = 2, |
||||||
|
.partd = { |
||||||
|
{ |
||||||
|
.type = MTD_CALDATA, |
||||||
|
.path = "/fs/mtd_caldata", |
||||||
|
.nblocks = 248 |
||||||
|
}, |
||||||
|
{ |
||||||
|
.type = MTD_ID, |
||||||
|
.path = "/fs/mtd_id", |
||||||
|
.nblocks = 8 // 256 = 32 * 8
|
||||||
|
} |
||||||
|
}, |
||||||
|
}; |
||||||
|
|
||||||
|
static const px4_mtd_manifest_t board_mtd_config = { |
||||||
|
.nconfigs = 2, |
||||||
|
.entries = { |
||||||
|
&fmum_fram, |
||||||
|
&imu_eeprom |
||||||
|
} |
||||||
|
}; |
||||||
|
|
||||||
|
static const px4_mft_entry_s mtd_mft = { |
||||||
|
.type = MTD, |
||||||
|
.pmft = (void *) &board_mtd_config, |
||||||
|
}; |
||||||
|
|
||||||
|
static const px4_mft_s mft = { |
||||||
|
.nmft = 1, |
||||||
|
.mfts = &mtd_mft |
||||||
|
}; |
||||||
|
|
||||||
|
const px4_mft_s *board_get_manifest(void) |
||||||
|
{ |
||||||
|
return &mft; |
||||||
|
} |
||||||
@ -0,0 +1,177 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. |
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org> |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
#include <nuttx/config.h> |
||||||
|
#include <board_config.h> |
||||||
|
|
||||||
|
#include <stdbool.h> |
||||||
|
#include <stdio.h> |
||||||
|
#include <debug.h> |
||||||
|
#include <errno.h> |
||||||
|
|
||||||
|
#include <nuttx/sdio.h> |
||||||
|
#include <nuttx/mmcsd.h> |
||||||
|
|
||||||
|
#include "chip.h" |
||||||
|
#include "board_config.h" |
||||||
|
#include "stm32_gpio.h" |
||||||
|
#include "stm32_sdmmc.h" |
||||||
|
|
||||||
|
#ifdef CONFIG_MMCSD |
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/* Card detections requires card support and a card detection GPIO */ |
||||||
|
|
||||||
|
#define HAVE_NCD 1 |
||||||
|
#if !defined(GPIO_SDMMC1_NCD) |
||||||
|
# undef HAVE_NCD |
||||||
|
#endif |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Private Data |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
static FAR struct sdio_dev_s *sdio_dev; |
||||||
|
#ifdef HAVE_NCD |
||||||
|
static bool g_sd_inserted = 0xff; /* Impossible value */ |
||||||
|
#endif |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Private Functions |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: stm32_ncd_interrupt |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* Card detect interrupt handler. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
#ifdef HAVE_NCD |
||||||
|
static int stm32_ncd_interrupt(int irq, FAR void *context) |
||||||
|
{ |
||||||
|
bool present; |
||||||
|
|
||||||
|
present = !stm32_gpioread(GPIO_SDMMC1_NCD); |
||||||
|
|
||||||
|
if (sdio_dev && present != g_sd_inserted) { |
||||||
|
sdio_mediachange(sdio_dev, present); |
||||||
|
g_sd_inserted = present; |
||||||
|
} |
||||||
|
|
||||||
|
return OK; |
||||||
|
} |
||||||
|
#endif |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: stm32_sdio_initialize |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* Initialize SDIO-based MMC/SD card support |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
int stm32_sdio_initialize(void) |
||||||
|
{ |
||||||
|
int ret; |
||||||
|
|
||||||
|
#ifdef HAVE_NCD |
||||||
|
/* Card detect */ |
||||||
|
|
||||||
|
bool cd_status; |
||||||
|
|
||||||
|
/* Configure the card detect GPIO */ |
||||||
|
|
||||||
|
stm32_configgpio(GPIO_SDMMC1_NCD); |
||||||
|
|
||||||
|
/* Register an interrupt handler for the card detect pin */ |
||||||
|
|
||||||
|
stm32_gpiosetevent(GPIO_SDMMC1_NCD, true, true, true, stm32_ncd_interrupt); |
||||||
|
#endif |
||||||
|
|
||||||
|
/* Mount the SDIO-based MMC/SD block driver */ |
||||||
|
/* First, get an instance of the SDIO interface */ |
||||||
|
|
||||||
|
finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO); |
||||||
|
|
||||||
|
sdio_dev = sdio_initialize(SDIO_SLOTNO); |
||||||
|
|
||||||
|
if (!sdio_dev) { |
||||||
|
syslog(LOG_ERR, "[boot] Failed to initialize SDIO slot %d\n", SDIO_SLOTNO); |
||||||
|
return -ENODEV; |
||||||
|
} |
||||||
|
|
||||||
|
/* Now bind the SDIO interface to the MMC/SD driver */ |
||||||
|
|
||||||
|
finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR); |
||||||
|
|
||||||
|
ret = mmcsd_slotinitialize(SDIO_MINOR, sdio_dev); |
||||||
|
|
||||||
|
if (ret != OK) { |
||||||
|
syslog(LOG_ERR, "[boot] Failed to bind SDIO to the MMC/SD driver: %d\n", ret); |
||||||
|
return ret; |
||||||
|
} |
||||||
|
|
||||||
|
finfo("Successfully bound SDIO to the MMC/SD driver\n"); |
||||||
|
|
||||||
|
#ifdef HAVE_NCD |
||||||
|
/* Use SD card detect pin to check if a card is g_sd_inserted */ |
||||||
|
|
||||||
|
cd_status = !stm32_gpioread(GPIO_SDMMC1_NCD); |
||||||
|
finfo("Card detect : %d\n", cd_status); |
||||||
|
|
||||||
|
sdio_mediachange(sdio_dev, cd_status); |
||||||
|
#else |
||||||
|
/* Assume that the SD card is inserted. What choice do we have? */ |
||||||
|
|
||||||
|
sdio_mediachange(sdio_dev, true); |
||||||
|
#endif |
||||||
|
|
||||||
|
return OK; |
||||||
|
} |
||||||
|
|
||||||
|
#endif /* CONFIG_MMCSD */ |
||||||
@ -0,0 +1,61 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (C) 2020, 2022 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
#include <px4_arch/spi_hw_description.h> |
||||||
|
#include <drivers/drv_sensor.h> |
||||||
|
#include <nuttx/spi/spi.h> |
||||||
|
|
||||||
|
constexpr px4_spi_bus_all_hw_t px4_spi_buses_all_hw[BOARD_NUM_SPI_CFG_HW_VERSIONS] = { |
||||||
|
initSPIHWVersion(V6C00, { |
||||||
|
initSPIBus(SPI::Bus::SPI1, { |
||||||
|
initSPIDevice(DRV_GYR_DEVTYPE_BMI055, SPI::CS{GPIO::PortC, GPIO::Pin14}, SPI::DRDY{GPIO::PortE, GPIO::Pin5}), |
||||||
|
initSPIDevice(DRV_ACC_DEVTYPE_BMI055, SPI::CS{GPIO::PortC, GPIO::Pin15}, SPI::DRDY{GPIO::PortE, GPIO::Pin4}), |
||||||
|
initSPIDevice(DRV_IMU_DEVTYPE_ICM42688P, SPI::CS{GPIO::PortC, GPIO::Pin13}, SPI::DRDY{GPIO::PortE, GPIO::Pin6}), |
||||||
|
}, {GPIO::PortB, GPIO::Pin2}), |
||||||
|
initSPIBus(SPI::Bus::SPI2, { |
||||||
|
initSPIDevice(SPIDEV_FLASH(0), SPI::CS{GPIO::PortD, GPIO::Pin4}) |
||||||
|
}), |
||||||
|
}), |
||||||
|
initSPIHWVersion(V6C10, { |
||||||
|
initSPIBus(SPI::Bus::SPI1, { |
||||||
|
initSPIDevice(DRV_GYR_DEVTYPE_BMI055, SPI::CS{GPIO::PortC, GPIO::Pin14}, SPI::DRDY{GPIO::PortE, GPIO::Pin5}), |
||||||
|
initSPIDevice(DRV_ACC_DEVTYPE_BMI055, SPI::CS{GPIO::PortC, GPIO::Pin15}, SPI::DRDY{GPIO::PortE, GPIO::Pin4}), |
||||||
|
initSPIDevice(DRV_IMU_DEVTYPE_ICM42688P, SPI::CS{GPIO::PortC, GPIO::Pin13}, SPI::DRDY{GPIO::PortE, GPIO::Pin6}), |
||||||
|
}, {GPIO::PortB, GPIO::Pin2}), |
||||||
|
initSPIBus(SPI::Bus::SPI2, { |
||||||
|
initSPIDevice(SPIDEV_FLASH(0), SPI::CS{GPIO::PortD, GPIO::Pin4}) |
||||||
|
}), |
||||||
|
}), |
||||||
|
}; |
||||||
|
|
||||||
|
static constexpr bool unused = validateSPIConfig(px4_spi_buses_all_hw); |
||||||
@ -0,0 +1,73 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (C) 2012 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
#include <px4_arch/io_timer_hw_description.h> |
||||||
|
|
||||||
|
/* Timer allocation
|
||||||
|
* |
||||||
|
* TIM1_CH1 T FMU_CH1 |
||||||
|
* TIM1_CH2 T FMU_CH2 |
||||||
|
* TIM1_CH3 T FMU_CH3 |
||||||
|
* TIM1_CH4 T FMU_CH4 |
||||||
|
* |
||||||
|
* TIM4_CH3 T FMU_CH5 |
||||||
|
* TIM4_CH4 T FMU_CH6 |
||||||
|
* |
||||||
|
* TIM5_CH1 T FMU_CH7 |
||||||
|
* TIM5_CH2 T FMU_CH8 |
||||||
|
* |
||||||
|
* TIM17_CH1 T HEATER > PWM OUT or GPIO |
||||||
|
* |
||||||
|
* TIM3_CH3 T BUZZER_1 - Driven by other driver |
||||||
|
*/ |
||||||
|
|
||||||
|
constexpr io_timers_t io_timers[MAX_IO_TIMERS] = { |
||||||
|
initIOTimer(Timer::Timer1, DMA{DMA::Index1}), |
||||||
|
initIOTimer(Timer::Timer4, DMA{DMA::Index1}), |
||||||
|
initIOTimer(Timer::Timer5), |
||||||
|
initIOTimer(Timer::Timer17), |
||||||
|
}; |
||||||
|
|
||||||
|
constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { |
||||||
|
initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel1}, {GPIO::PortA, GPIO::Pin8}), |
||||||
|
initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel2}, {GPIO::PortE, GPIO::Pin11}), |
||||||
|
initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel3}, {GPIO::PortE, GPIO::Pin13}), |
||||||
|
initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel4}, {GPIO::PortE, GPIO::Pin14}), |
||||||
|
initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel3}, {GPIO::PortD, GPIO::Pin14}), |
||||||
|
initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel4}, {GPIO::PortD, GPIO::Pin15}), |
||||||
|
initIOTimerChannel(io_timers, {Timer::Timer5, Timer::Channel1}, {GPIO::PortA, GPIO::Pin0}), |
||||||
|
initIOTimerChannel(io_timers, {Timer::Timer5, Timer::Channel2}, {GPIO::PortA, GPIO::Pin1}), |
||||||
|
}; |
||||||
|
|
||||||
|
constexpr io_timers_channel_mapping_t io_timers_channel_mapping = |
||||||
|
initIOTimerChannelMapping(io_timers, timer_io_channels); |
||||||
@ -0,0 +1,105 @@ |
|||||||
|
/****************************************************************************
|
||||||
|
* |
||||||
|
* Copyright (C) 2016 PX4 Development Team. All rights reserved. |
||||||
|
* |
||||||
|
* Redistribution and use in source and binary forms, with or without |
||||||
|
* modification, are permitted provided that the following conditions |
||||||
|
* are met: |
||||||
|
* |
||||||
|
* 1. Redistributions of source code must retain the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer. |
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright |
||||||
|
* notice, this list of conditions and the following disclaimer in |
||||||
|
* the documentation and/or other materials provided with the |
||||||
|
* distribution. |
||||||
|
* 3. Neither the name PX4 nor the names of its contributors may be |
||||||
|
* used to endorse or promote products derived from this software |
||||||
|
* without specific prior written permission. |
||||||
|
* |
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||||
|
* POSSIBILITY OF SUCH DAMAGE. |
||||||
|
* |
||||||
|
****************************************************************************/ |
||||||
|
|
||||||
|
/**
|
||||||
|
* @file px4fmu_usb.c |
||||||
|
* |
||||||
|
* Board-specific USB functions. |
||||||
|
*/ |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
#include <px4_platform_common/px4_config.h> |
||||||
|
|
||||||
|
#include <sys/types.h> |
||||||
|
#include <stdint.h> |
||||||
|
#include <stdbool.h> |
||||||
|
#include <debug.h> |
||||||
|
|
||||||
|
#include <nuttx/usb/usbdev.h> |
||||||
|
#include <nuttx/usb/usbdev_trace.h> |
||||||
|
|
||||||
|
#include <arm_arch.h> |
||||||
|
#include <chip.h> |
||||||
|
#include <stm32_gpio.h> |
||||||
|
#include <stm32_otg.h> |
||||||
|
#include "board_config.h" |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Definitions |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Private Functions |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Functions |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: stm32_usbinitialize |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* Called to setup USB-related GPIO pins for the PX4FMU board. |
||||||
|
* |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
__EXPORT void stm32_usbinitialize(void) |
||||||
|
{ |
||||||
|
/* The OTG FS has an internal soft pull-up */ |
||||||
|
|
||||||
|
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ |
||||||
|
|
||||||
|
#ifdef CONFIG_STM32H7_OTGFS |
||||||
|
stm32_configgpio(GPIO_OTGFS_VBUS); |
||||||
|
#endif |
||||||
|
} |
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: stm32_usbsuspend |
||||||
|
* |
||||||
|
* Description: |
||||||
|
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is |
||||||
|
* used. This function is called whenever the USB enters or leaves suspend mode. |
||||||
|
* This is an opportunity for the board logic to shutdown clocks, power, etc. |
||||||
|
* while the USB is suspended. |
||||||
|
* |
||||||
|
************************************************************************************/ |
||||||
|
|
||||||
|
__EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) |
||||||
|
{ |
||||||
|
uinfo("resume: %d\n", resume); |
||||||
|
} |
||||||
Loading…
Reference in new issue