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Updates from Darcy Gong for UG-2864SWEG01 OLED

git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5469 42af7a65-404d-4744-a932-0658087f49c3
sbg
patacongo 12 years ago
parent
commit
29da58a677
  1. 4
      nuttx/ChangeLog
  2. 21
      nuttx/configs/stm32f4discovery/README.txt
  3. 5
      nuttx/configs/stm32f4discovery/src/stm32f4discovery-internal.h
  4. 28
      nuttx/configs/stm32f4discovery/src/up_spi.c
  5. 2
      nuttx/configs/stm32f4discovery/src/up_ug2864ambag01.c
  6. 6
      nuttx/configs/stm32f4discovery/src/up_ug2864hsweg01.c
  7. 4
      nuttx/drivers/lcd/ug-2864ambag01.c
  8. 73
      nuttx/drivers/lcd/ug-2864hsweg01.c

4
nuttx/ChangeLog

@ -3845,6 +3845,8 @@ @@ -3845,6 +3845,8 @@
* configs/zp214xpa/nxlines: Add an nxlines configuration for the
ZP213x/4xPA (with the LPC2148 and the UG_2864AMBAG01). Working
as of 2012-12-30.
* config/olimex-lpc1766stk/wlan: Remove non-functional
* configs/olimex-lpc1766stk/wlan: Remove non-functional
configuration.
* configs/stm32f4discovery/src and nuttx/drivers/lcd/ug-2864hsweg01.c:
Updates and correctinos for the UG-2864HSWEG01 from Darcy Gong.

21
nuttx/configs/stm32f4discovery/README.txt

@ -20,7 +20,7 @@ Contents @@ -20,7 +20,7 @@ Contents
- FPU
- FSMC SRAM
- SSD1289
- UG-2864AMBAG01
- UG-2864AMBAG01 / UG-2964SWEG01
- STM32F4Discovery-specific Configuration Options
- Configurations
@ -696,10 +696,10 @@ The following summarize the bit banging oprations: @@ -696,10 +696,10 @@ The following summarize the bit banging oprations:
WriteData(data);
}
UG-2864AMBAG01
==============
UG-2864AMBAG01 / UG-2964SWEG01
==============================
I purchased an OLED display on eBay. The OLDE is 128x64 monochrome and
I purchased an OLED display on eBay. The OLED is 128x64 monochrome and
is based on an UG-2864AMBAG01 OLED controller. The OLED can run in either
parallel or SPI mode. I am using SPI mode. In SPI mode, the OLED is
write only so the driver keeps a 128*64/8 = 1KB framebuffer to remember
@ -729,6 +729,10 @@ that I am using: @@ -729,6 +729,10 @@ that I am using:
(1) Required because of on-board MEMS
-------------------------------------------------------------------------
Darcy Gong recently added support for the UG-2964SWEG01 OLED which is also
an option with this configuratin. I have little technical information about
the UG-2964SWEG01 interface (see configs/stm32f4discovery/src/up_ug2864sweg01.c).
STM32F4Discovery-specific Configuration Options
===============================================
@ -1347,9 +1351,10 @@ Where <subdir> is one of the following: @@ -1347,9 +1351,10 @@ Where <subdir> is one of the following:
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
3. This configured can be re-configured to use the UG-2864AMBAG01
0.96 inch OLED by adding or changing the following items int
the configuration (using 'make menuconfig'):
3. This configured can be re-configured to use either the
UG-2864AMBAG01 or UG-2864SWEG01 0.96 inch OLEDs by adding
or changing the following items in the configuration (using
'make menuconfig'):
+CONFIG_SPI_CMDDATA=y
@ -1360,7 +1365,7 @@ Where <subdir> is one of the following: @@ -1360,7 +1365,7 @@ Where <subdir> is one of the following:
-CONFIG_LCD_SSD1289=y
-CONFIG_SSD1289_PROFILE1=y
+CONFIG_LCD_UG2864AMBAG01=y
+CONFIG_LCD_UG2864AMBAG01=y : For the UG-2964AMBAG01
+CONFIG_UG2864AMBAG01_SPIMODE=3
+CONFIG_UG2864AMBAG01_FREQUENCY=3500000
+CONFIG_UG2864AMBAG01_NINTERFACES=1

5
nuttx/configs/stm32f4discovery/src/stm32f4discovery-internal.h

@ -113,7 +113,7 @@ @@ -113,7 +113,7 @@
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5)
#endif
/* UG-2864AMBAG01 or UG-2864HSWEG01 OLED Display:
/* UG-2864AMBAG01 or UG-2864HSWEG01 OLED Display (SPI 4-wire):
*
* --------------------------+----------------------------------------------
* Connector CON10 J1: | STM32F4Discovery
@ -123,7 +123,7 @@ @@ -123,7 +123,7 @@
* 1 3v3 | 3,4 3v3 | P2 3V
* 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection)
* 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection)
* 7 A0 | 9 A0 | P2 PB8 (Arbitrary selection)
* 7 A0|D/C | 9 A0|D/C | P2 PB8 (Arbitrary selection)
* 9 LED+ (N/C) | ----- | -----
* 2 5V Vcc | 1,2 Vcc | P2 5V
* 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1 (1))
@ -142,6 +142,7 @@ @@ -142,6 +142,7 @@
GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7)
# define GPIO_OLED_A0 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
# define GPIO_OLED_DC GPIO_OLED_A0
#endif
/****************************************************************************************************

28
nuttx/configs/stm32f4discovery/src/up_spi.c

@ -96,11 +96,16 @@ @@ -96,11 +96,16 @@
void weak_function stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI1
(void)stm32_configgpio(GPIO_CS_MEMS);
(void)stm32_configgpio(GPIO_CS_MEMS); /* MEMS chip select */
#endif
#ifdef CONFIG_LCD_UG2864AMBAG01
#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
(void)stm32_configgpio(GPIO_OLED_CS); /* OLED chip select */
# if defined(CONFIG_LCD_UG2864AMBAG01)
(void)stm32_configgpio(GPIO_OLED_A0); /* OLED Command/Data */
# endif
# if defined(CONFIG_LCD_UG2864HSWEG01)
(void)stm32_configgpio(GPIO_OLED_DC); /* OLED Command/Data */
# endif
#endif
}
@ -134,7 +139,7 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele @@ -134,7 +139,7 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#ifdef CONFIG_LCD_UG2864AMBAG01
#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
if (devid == SPIDEV_DISPLAY)
{
stm32_gpiowrite(GPIO_OLED_CS, !selected);
@ -180,9 +185,9 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -180,9 +185,9 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
* Name: stm32_spi1cmddata
*
* Description:
* Set or clear the SD1329 D/Cn bit to select data (true) or command
* (false). This function must be provided by platform-specific logic.
* This is an implementation of the cmddata method of the SPI
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
* or command (false). This function must be provided by platform-specific
* logic. This is an implementation of the cmddata method of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi.h).
*
* Input Parameters:
@ -203,18 +208,23 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -203,18 +208,23 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
#ifdef CONFIG_LCD_UG2864AMBAG01
#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
if (devid == SPIDEV_DISPLAY)
{
/* "This is the Data/Command control pad which determines whether the
* data bits are data or a command.
*
* A0 = H: the inputs at D0 to D7 are treated as display data.
* A0 = L: the inputs at D0 to D7 are transferred to the command
* A0 = "H": the inputs at D0 to D7 are treated as display data.
* A0 = "L": the inputs at D0 to D7 are transferred to the command
* registers."
*/
# if defined(CONFIG_LCD_UG2864AMBAG01)
(void)stm32_gpiowrite(GPIO_OLED_A0, !cmd);
# endif
# if defined(CONFIG_LCD_UG2864HSWEG01)
(void)stm32_gpiowrite(GPIO_OLED_DC, !cmd);
# endif
return OK;
}
#endif

2
nuttx/configs/stm32f4discovery/src/up_ug2864ambag01.c

@ -66,7 +66,7 @@ @@ -66,7 +66,7 @@
#endif
/* Pin Configuration ********************************************************/
/* UG-2864AMBAG01 OLED Display:
/* UG-2864AMBAG01 OLED Display (SPI 4-wire):
*
* --------------------------+----------------------------------------------
* Connector CON10 J1: | STM32F4Discovery

6
nuttx/configs/stm32f4discovery/src/up_ug2864hsweg01.c

@ -66,7 +66,7 @@ @@ -66,7 +66,7 @@
#endif
/* Pin Configuration ********************************************************/
/* UG-2864AMBAG01 or UG-2864HSWEG01 OLED Display:
/* UG-2864HSWEG01 OLED Display (SPI 4-wire):
*
* --------------------------+----------------------------------------------
* Connector CON10 J1: | STM32F4Discovery
@ -76,7 +76,7 @@ @@ -76,7 +76,7 @@
* 1 3v3 | 3,4 3v3 | P2 3V
* 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection)
* 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection)(2)
* 7 A0 | 9 A0 | P2 PB8 (Arbitrary selection)(2)
* 7 D/C | 9 D/C | P2 PB8 (Arbitrary selection)(2)
* 9 LED+ (N/C) | ----- | -----
* 2 5V Vcc | 1,2 Vcc | P2 5V
* 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1 (1))
@ -85,7 +85,7 @@ @@ -85,7 +85,7 @@
* 10 GND | 20 GND | P2 GND
* --------------+-----------+----------------------------------------------
* (1) Required because of on-board MEMS
* (2) Note that the OLED CS and A0 are managed in the up_spi.c file.
* (2) Note that the OLED CS and D/C are managed in the up_spi.c file.
* -------------------------------------------------------------------------
*/

4
nuttx/drivers/lcd/ug-2864ambag01.c

@ -428,7 +428,7 @@ static inline void ug2864ambag01_configspi(FAR struct spi_dev_s *spi) @@ -428,7 +428,7 @@ static inline void ug2864ambag01_configspi(FAR struct spi_dev_s *spi)
SPI_SETMODE(spi, CONFIG_UG2864AMBAG01_SPIMODE);
SPI_SETBITS(spi, 8);
SPI_SETFREQUENCY(spi, CONFIG_UG2864AMBAG01_FREQUENCY)
SPI_SETFREQUENCY(spi, CONFIG_UG2864AMBAG01_FREQUENCY);
}
#endif
@ -1035,7 +1035,7 @@ FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi, unsign @@ -1035,7 +1035,7 @@ FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi, unsign
/* Configure the SPI */
ug2864ambag01_configspi(spi)
ug2864ambag01_configspi(spi);
/* Lock and select device */

73
nuttx/drivers/lcd/ug-2864hsweg01.c

@ -434,7 +434,7 @@ static inline void ug2864hsweg01_configspi(FAR struct spi_dev_s *spi) @@ -434,7 +434,7 @@ static inline void ug2864hsweg01_configspi(FAR struct spi_dev_s *spi)
SPI_SETMODE(spi, CONFIG_UG2864HSWEG01_SPIMODE);
SPI_SETBITS(spi, 8);
SPI_SETFREQUENCY(spi, CONFIG_UG2864HSWEG01_FREQUENCY)
SPI_SETFREQUENCY(spi, CONFIG_UG2864HSWEG01_FREQUENCY);
}
#endif
@ -1041,7 +1041,7 @@ FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, unsign @@ -1041,7 +1041,7 @@ FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, unsign
/* Configure the SPI */
ug2864hsweg01_configspi(spi)
ug2864hsweg01_configspi(spi);
/* Lock and select device */
@ -1052,40 +1052,81 @@ FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, unsign @@ -1052,40 +1052,81 @@ FAR struct lcd_dev_s *ug2864hsweg01_initialize(FAR struct spi_dev_s *spi, unsign
SPI_CMDDATA(spi, SPIDEV_DISPLAY, true);
/* Configure OLED SPI or I/O, must be delayed 1-10ms */
up_mdelay(5);
/* Configure the device */
//#define OLED_WriteCmd(v) SPI_SEND(spi,v)
//
// /* Module manufacturers to provide initialization code 模块厂家提供初始化代码 */
//
// OLED_WriteCmd(0xAE); /* 关闭OLED面板显示(休眠) */
// OLED_WriteCmd(0x00); /* 设置列地址低4bit */
// OLED_WriteCmd(0x10); /* 设置列地址高4bit */
// OLED_WriteCmd(0x40); /* 设置起始行地址(低5bit 0-63), 硬件相关*/
//
// OLED_WriteCmd(0x81); /* 设置对比度命令(双字节命令),第1个字节是命令,第2个字节是对比度参数0-255 */
// OLED_WriteCmd(0xCF); /* 设置对比度参数 */
//
// OLED_WriteCmd(0xA1); /* A0 :列地址0映射到SEG0; A1 :列地址127映射到SEG0 */
// OLED_WriteCmd(0xA6); /* A6 : 设置正常显示模式; A7 : 设置为反显模式 */
//
// OLED_WriteCmd(0xA8); /* 设置COM路数 */
// OLED_WriteCmd(0x3F); /* 1 ->(63+1)路 */
//
// OLED_WriteCmd(0xD3); /* 设置显示偏移(双字节命令)*/
// OLED_WriteCmd(0x00); /* 无偏移 */
//
// OLED_WriteCmd(0xD5); /* 设置显示时钟分频系数/振荡频率 */
// OLED_WriteCmd(0x80); /* 设置分频系数,高4bit是分频系数,低4bit是振荡频率 */
//
// OLED_WriteCmd(0xD9); /* 设置预充电周期 */
// OLED_WriteCmd(0xF1); /* [3:0],PHASE 1; [7:4],PHASE 2; */
//
// OLED_WriteCmd(0xDA); /* 设置COM脚硬件接线方式 */
// OLED_WriteCmd(0x12);
//
// OLED_WriteCmd(0xDB); /* 设置 vcomh 电压倍率 */
// OLED_WriteCmd(0x40); /* [6:4] 000 = 0.65 x VCC; 0.77 x VCC (RESET); 0.83 x VCC */
//
// OLED_WriteCmd(0x8D); /* 设置充电泵(和下个命令结合使用) */
// OLED_WriteCmd(0x14); /* 0x14 使能充电泵, 0x10 是关闭 */
// OLED_WriteCmd(0xAF); /* 打开OLED面板 */
SPI_SEND(spi, SSD1306_DISPOFF); /* Display off 0xAE*/
SPI_SEND(spi, SSD1306_SETCOLL(0)); /* Set lower column address 0x00 */
SPI_SEND(spi, SSD1306_SETCOLH(0)); /* Set higher column address 0x10 */
SPI_SEND(spi, SSD1306_STARTLINE(0)); /* Set display start line 0x40*/
SPI_SEND(spi, SSD1306_PAGEADDR(0)); /* Set page address [可忽略] */
/* SPI_SEND(spi, SSD1306_PAGEADDR(0));*//* Set page address (Can ignore)*/
SPI_SEND(spi, SSD1306_CONTRAST_MODE); /* Contrast control 0x81*/
SPI_SEND(spi ,SSD1306_CONTRAST(UG2864HSWEG01_CONTRAST)); /* Default contrast 0xCF */
SPI_SEND(spi, SSD1306_REMAPPLEFT); /* Set segment remap left 95 to 0 | 0xA1*/
SPI_SEND(spi, SSD1306_EDISPOFF); /* Normal display :off 0xA4 [多出的一行] */
/* SPI_SEND(spi, SSD1306_EDISPOFF); */ /* Normal display :off 0xA4 (Can ignore)*/
SPI_SEND(spi, SSD1306_NORMAL); /* Normal (un-reversed) display mode 0xA6 */
SPI_SEND(spi, SSD1306_MRATIO_MODE); /* Multiplex ratio 0xA8*/
SPI_SEND(spi, SSD1306_MRATIO(0x3f)); /* Duty = 1/64 */
SPI_SEND(spi, SSD1306_SCANTOCOM0); /* Com scan direction: Scan from COM[n-1] to COM[0] [可忽略] */
/* SPI_SEND(spi, SSD1306_SCANTOCOM0);*/ /* Com scan direction: Scan from COM[n-1] to COM[0] (Can ignore)*/
SPI_SEND(spi, SSD1306_DISPOFFS_MODE); /* Set display offset 0xD3 */
SPI_SEND(spi, SSD1306_DISPOFFS(0));
SPI_SEND(spi, SSD1306_CLKDIV_SET); /* Set clock divider 0xD5*/
SPI_SEND(spi, SSD1306_CLKDIV(8,0)); /* 0x80 ? 检查 默认0,0*/
SPI_SEND(spi, SSD1306_CLKDIV(8,0)); /* 0x80*/
SPI_SEND(spi, SSD1306_CHRGPER_SET); /* ++Set pre-charge period 0xD9*/
SPI_SEND(spi, SSD1306_CHRGPER(0x0f,1)); /* 0xf1 or 0x22(增强模式?) */
SPI_SEND(spi, SSD1306_CHRGPER(0x0f,1)); /* 0xf1 or 0x22(Enhanced mode?) */
SPI_SEND(spi, SSD1306_CMNPAD_CONFIG); /* Set common pads / set com pins hardware configuration 0xDA*/
SPI_SEND(spi, SSD1306_CMNPAD(0x12)); /* 0x12 ? 检查 默认 0x10 */
SPI_SEND(spi, SSD1306_VCOM_SET); /* set vcomh 0xDB*/
SPI_SEND(spi, SSD1306_CMNPAD(0x12)); /* 0x12 */
SPI_SEND(spi, SSD1306_VCOM_SET); /* set vcomh 0xDB*/
SPI_SEND(spi, SSD1306_VCOM(0x40));
SPI_SEND(spi, SSD1306_CHRPUMP_SET); /* ++Set Charge Pump enable/disable 0x8D 增加的*/
SPI_SEND(spi, SSD1306_CHRPUMP_ON); /* 0x14 */
SPI_SEND(spi, SSD1306_CHRPUMP_SET); /* ++Set Charge Pump enable/disable 0x8D ssd1306*/
SPI_SEND(spi, SSD1306_CHRPUMP_ON); /* 0x14 close 0x10 */
//SPI_SEND(spi, SSD1306_DCDC_MODE); /* DC/DC control mode: on */
//SPI_SEND(spi, SSD1306_DCDC_ON);
/*SPI_SEND(spi, SSD1306_DCDC_MODE); */ /* DC/DC control mode: on (SSD1306 Not supported) */
/*SPI_SEND(spi, SSD1306_DCDC_ON); */
SPI_SEND(spi, SSD1306_DISPON); /* display ON 0xAF */

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