@ -51,7 +51,7 @@ MPU9250::MPU9250(I2CSPIBusOption bus_option, int bus, uint32_t device, enum Rota
@@ -51,7 +51,7 @@ MPU9250::MPU9250(I2CSPIBusOption bus_option, int bus, uint32_t device, enum Rota
_px4_gyro ( get_device_id ( ) , ORB_PRIO_HIGH , rotation )
{
if ( drdy_gpio ! = 0 ) {
_drdy_interval _perf = perf_alloc ( PC_INTERVAL , MODULE_NAME " : DRDY interval " ) ;
_drdy_missed _perf = perf_alloc ( PC_COUNT , MODULE_NAME " : DRDY missed " ) ;
}
ConfigureSampleRate ( _px4_gyro . get_max_rate_hz ( ) ) ;
@ -82,7 +82,7 @@ MPU9250::~MPU9250()
@@ -82,7 +82,7 @@ MPU9250::~MPU9250()
perf_free ( _fifo_empty_perf ) ;
perf_free ( _fifo_overflow_perf ) ;
perf_free ( _fifo_reset_perf ) ;
perf_free ( _drdy_interval _perf ) ;
perf_free ( _drdy_missed _perf ) ;
delete _slave_ak8963_magnetometer ;
}
@ -118,14 +118,14 @@ void MPU9250::print_status()
@@ -118,14 +118,14 @@ void MPU9250::print_status()
{
I2CSPIDriverBase : : print_status ( ) ;
PX4_INFO ( " FIFO empty interval: %d us (%.3 f Hz) " , _fifo_empty_interval_us , 1e6 / _fifo_empty_interval_us ) ;
PX4_INFO ( " FIFO empty interval: %d us (%.1 f Hz) " , _fifo_empty_interval_us , 1e6 / _fifo_empty_interval_us ) ;
perf_print_counter ( _bad_register_perf ) ;
perf_print_counter ( _bad_transfer_perf ) ;
perf_print_counter ( _fifo_empty_perf ) ;
perf_print_counter ( _fifo_overflow_perf ) ;
perf_print_counter ( _fifo_reset_perf ) ;
perf_print_counter ( _drdy_interval _perf ) ;
perf_print_counter ( _drdy_missed _perf ) ;
if ( _slave_ak8963_magnetometer ) {
@ -154,7 +154,7 @@ void MPU9250::RunImpl()
@@ -154,7 +154,7 @@ void MPU9250::RunImpl()
// PWR_MGMT_1: Device Reset
RegisterWrite ( Register : : PWR_MGMT_1 , PWR_MGMT_1_BIT : : H_RESET ) ;
_reset_timestamp = now ;
_consecutive_failures = 0 ;
_failure_count = 0 ;
_state = STATE : : WAIT_FOR_RESET ;
ScheduleDelayed ( 100 _ms ) ;
break ;
@ -167,11 +167,11 @@ void MPU9250::RunImpl()
@@ -167,11 +167,11 @@ void MPU9250::RunImpl()
& & ( RegisterRead ( Register : : PWR_MGMT_1 ) = = 0x01 ) ) {
// Wakeup and reset digital signal path
RegisterWrite ( Register : : PWR_MGMT_1 , 0 ) ;
RegisterWrite ( Register : : PWR_MGMT_1 , PWR_MGMT_1_BIT : : CLKSEL_ 0) ;
RegisterWrite ( Register : : SIGNAL_PATH_RESET ,
SIGNAL_PATH_RESET_BIT : : GYRO_RESET | SIGNAL_PATH_RESET_BIT : : ACCEL_RESET | SIGNAL_PATH_RESET_BIT : : TEMP_RESET ) ;
RegisterWrite ( Register : : USER_CTRL , USER_CTRL_BIT : : I2C_MST_EN | USER_CTRL_BIT : : I2C_IF_DIS | USER_CTRL_BIT : : I2C_MST_RST |
USER_CTRL_BIT : : SIG_COND _RST) ;
RegisterWrite ( Register : : USER_CTRL , USER_CTRL_BIT : : I2C_MST_EN | USER_CTRL_BIT : : SIG_COND_RST | USER_CTRL_BIT : : I2C_IF_DIS |
USER_CTRL_BIT : : I2C_MST _RST) ;
// if reset succeeded then configure
_state = STATE : : CONFIGURE ;
@ -233,8 +233,8 @@ void MPU9250::RunImpl()
@@ -233,8 +233,8 @@ void MPU9250::RunImpl()
case STATE : : FIFO_READ : {
if ( _data_ready_interrupt_enabled ) {
// scheduled from interrupt if _drdy_fifo_read_samples was set
if ( _drdy_fifo_read_samples . fetch_and ( 0 ) = = _fifo_gyro_samples ) {
perf_count_interval ( _drdy_interval_perf , now ) ;
if ( _drdy_fifo_read_samples . fetch_and ( 0 ) ! = _fifo_gyro_samples ) {
perf_count ( _drdy_missed_perf ) ;
}
// push backup schedule back
@ -265,22 +265,25 @@ void MPU9250::RunImpl()
@@ -265,22 +265,25 @@ void MPU9250::RunImpl()
} else if ( samples > = 1 ) {
if ( FIFORead ( now , samples ) ) {
success = true ;
_consecutive_failures = 0 ;
if ( _failure_count > 0 ) {
_failure_count - - ;
}
}
}
}
if ( ! success ) {
_consecutive_failures + + ;
_failure_count + + ;
// full reset if things are failing consistently
if ( _consecutive_failures > 10 ) {
if ( _failure_count > 10 ) {
Reset ( ) ;
return ;
}
}
if ( ! success | | hrt_elapsed_time ( & _last_config_check_timestamp ) > 10 _ms ) {
if ( ! success | | hrt_elapsed_time ( & _last_config_check_timestamp ) > 100 _ms ) {
// check configuration registers periodically or immediately following any failure
if ( RegisterCheck ( _register_cfg [ _checked_register ] ) ) {
_last_config_check_timestamp = now ;
@ -406,12 +409,12 @@ int MPU9250::DataReadyInterruptCallback(int irq, void *context, void *arg)
@@ -406,12 +409,12 @@ int MPU9250::DataReadyInterruptCallback(int irq, void *context, void *arg)
void MPU9250 : : DataReady ( )
{
const uint8_t count = _drdy_count . fetch_add ( 1 ) + 1 ;
uint8_t expected = 0 ;
uint32_t expected = 0 ;
// at least the required number of samples in the FIFO
if ( ( count > = _fifo_gyro_samples ) & & _drdy_fifo_read_samples . compare_exchange ( & expected , _fifo_gyro_samples ) ) {
if ( ( ( _drdy_count . fetch_add ( 1 ) + 1 ) > = _fifo_gyro_samples )
& & _drdy_fifo_read_samples . compare_exchange ( & expected , _fifo_gyro_samples ) ) {
_drdy_count . store ( 0 ) ;
ScheduleNow ( ) ;
}