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@ -135,7 +135,6 @@ private:
@@ -135,7 +135,6 @@ private:
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DMA_HANDLE _tx_dma; |
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DMA_HANDLE _rx_dma; |
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volatile unsigned _rx_length; |
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/** saved DMA status */ |
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static const unsigned _dma_status_inactive = 0x80000000; // low bits overlap DMA_STATUS_* values
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@ -173,12 +172,14 @@ private:
@@ -173,12 +172,14 @@ private:
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/**
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* Performance counters. |
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*/ |
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perf_counter_t _perf_dmasetup; |
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perf_counter_t _perf_timeouts; |
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perf_counter_t _perf_crcerrs; |
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perf_counter_t _perf_dmaerrs; |
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perf_counter_t _perf_protoerrs; |
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perf_counter_t _perf_txns; |
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perf_counter_t _pc_dmasetup; |
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perf_counter_t _pc_timeouts; |
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perf_counter_t _pc_crcerrs; |
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perf_counter_t _pc_dmaerrs; |
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perf_counter_t _pc_protoerrs; |
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perf_counter_t _pc_idle; |
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perf_counter_t _pc_badidle; |
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perf_counter_t _pc_txns; |
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}; |
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@ -193,14 +194,15 @@ PX4IO_interface *io_serial_interface()
@@ -193,14 +194,15 @@ PX4IO_interface *io_serial_interface()
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PX4IO_serial::PX4IO_serial() : |
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_tx_dma(nullptr), |
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_rx_dma(nullptr), |
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_rx_length(0), |
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_rx_dma_status(_dma_status_inactive), |
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_perf_dmasetup(perf_alloc(PC_ELAPSED, "dmasetup ")), |
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_perf_timeouts(perf_alloc(PC_COUNT, "timeouts ")), |
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_perf_crcerrs(perf_alloc(PC_COUNT, "crcerrs ")), |
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_perf_dmaerrs(perf_alloc(PC_COUNT, "dmaerrs ")), |
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_perf_protoerrs(perf_alloc(PC_COUNT, "protoerrs")), |
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_perf_txns(perf_alloc(PC_ELAPSED, "txns ")) |
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_pc_dmasetup(perf_alloc(PC_ELAPSED, "dmasetup ")), |
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_pc_timeouts(perf_alloc(PC_COUNT, "timeouts ")), |
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_pc_crcerrs(perf_alloc(PC_COUNT, "crcerrs ")), |
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_pc_dmaerrs(perf_alloc(PC_COUNT, "dmaerrs ")), |
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_pc_protoerrs(perf_alloc(PC_COUNT, "protoerrs")), |
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_pc_idle(perf_alloc(PC_COUNT, "idle ")), |
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_pc_badidle(perf_alloc(PC_COUNT, "badidle ")), |
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_pc_txns(perf_alloc(PC_ELAPSED, "txns ")) |
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{ |
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/* allocate DMA */ |
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_tx_dma = stm32_dmachannel(PX4IO_SERIAL_TX_DMAMAP); |
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@ -233,7 +235,7 @@ PX4IO_serial::PX4IO_serial() :
@@ -233,7 +235,7 @@ PX4IO_serial::PX4IO_serial() :
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/* enable UART in DMA mode, enable error and line idle interrupts */ |
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/* rCR3 = USART_CR3_EIE;*/ |
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rCR1 = USART_CR1_RE | USART_CR1_TE | USART_CR1_UE /*| USART_CR1_IDLEIE*/; |
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rCR1 = USART_CR1_RE | USART_CR1_TE | USART_CR1_UE | USART_CR1_IDLEIE; |
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/* create semaphores */ |
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sem_init(&_completion_semaphore, 0, 0); |
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@ -270,12 +272,14 @@ PX4IO_serial::~PX4IO_serial()
@@ -270,12 +272,14 @@ PX4IO_serial::~PX4IO_serial()
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sem_destroy(&_completion_semaphore); |
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sem_destroy(&_bus_semaphore); |
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perf_free(_perf_dmasetup); |
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perf_free(_perf_timeouts); |
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perf_free(_perf_txns); |
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perf_free(_perf_crcerrs); |
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perf_free(_perf_dmaerrs); |
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perf_free(_perf_protoerrs); |
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perf_free(_pc_dmasetup); |
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perf_free(_pc_timeouts); |
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perf_free(_pc_crcerrs); |
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perf_free(_pc_dmaerrs); |
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perf_free(_pc_protoerrs); |
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perf_free(_pc_idle); |
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perf_free(_pc_badidle); |
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perf_free(_pc_txns); |
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if (g_interface == this) |
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g_interface = nullptr; |
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@ -321,13 +325,15 @@ PX4IO_serial::test(unsigned mode)
@@ -321,13 +325,15 @@ PX4IO_serial::test(unsigned mode)
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set_reg(PX4IO_PAGE_TEST, PX4IO_P_TEST_LED, &value, 1); |
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/* ignore errors */ |
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if (count > 100) { |
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perf_print_counter(_perf_dmasetup); |
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perf_print_counter(_perf_timeouts); |
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perf_print_counter(_perf_txns); |
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perf_print_counter(_perf_crcerrs); |
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perf_print_counter(_perf_dmaerrs); |
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perf_print_counter(_perf_protoerrs); |
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if (count >= 100) { |
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perf_print_counter(_pc_dmasetup); |
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perf_print_counter(_pc_timeouts); |
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perf_print_counter(_pc_crcerrs); |
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perf_print_counter(_pc_dmaerrs); |
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perf_print_counter(_pc_protoerrs); |
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perf_print_counter(_pc_idle); |
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perf_print_counter(_pc_badidle); |
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perf_print_counter(_pc_txns); |
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count = 0; |
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} |
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usleep(10000); |
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@ -404,17 +410,27 @@ PX4IO_serial::_wait_complete()
@@ -404,17 +410,27 @@ PX4IO_serial::_wait_complete()
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(void)rDR; |
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/* start RX DMA */ |
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perf_begin(_perf_txns); |
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perf_begin(_perf_dmasetup); |
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perf_begin(_pc_txns); |
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perf_begin(_pc_dmasetup); |
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/* DMA setup time ~3µs */ |
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_rx_dma_status = _dma_status_waiting; |
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_rx_length = 0; |
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/*
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* Note that we enable circular buffer mode as a workaround for |
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* there being no API to disable the DMA FIFO. We need direct mode |
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* because otherwise when the line idle interrupt fires there |
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* will be packet bytes still in the DMA FIFO, and we will assume |
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* that the idle was spurious. |
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* |
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* XXX this should be fixed with a NuttX change. |
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*/ |
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stm32_dmasetup( |
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_rx_dma, |
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PX4IO_SERIAL_BASE + STM32_USART_DR_OFFSET, |
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reinterpret_cast<uint32_t>(&_dma_buffer), |
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sizeof(_dma_buffer), |
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DMA_SCR_CIRC | /* XXX see note above */ |
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DMA_SCR_DIR_P2M | |
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DMA_SCR_MINC | |
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DMA_SCR_PSIZE_8BITS | |
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@ -432,7 +448,7 @@ PX4IO_serial::_wait_complete()
@@ -432,7 +448,7 @@ PX4IO_serial::_wait_complete()
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_tx_dma, |
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PX4IO_SERIAL_BASE + STM32_USART_DR_OFFSET, |
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reinterpret_cast<uint32_t>(&_dma_buffer), |
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sizeof(_dma_buffer), /* XXX should be PKT_LENGTH() */ |
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PKT_SIZE(_dma_buffer), |
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DMA_SCR_DIR_M2P | |
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DMA_SCR_MINC | |
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DMA_SCR_PSIZE_8BITS | |
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@ -442,7 +458,7 @@ PX4IO_serial::_wait_complete()
@@ -442,7 +458,7 @@ PX4IO_serial::_wait_complete()
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stm32_dmastart(_tx_dma, nullptr, nullptr, false); |
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rCR3 |= USART_CR3_DMAT; |
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perf_end(_perf_dmasetup); |
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perf_end(_pc_dmasetup); |
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/* compute the deadline for a 5ms timeout */ |
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struct timespec abstime; |
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@ -465,7 +481,7 @@ PX4IO_serial::_wait_complete()
@@ -465,7 +481,7 @@ PX4IO_serial::_wait_complete()
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if (ret == OK) { |
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/* check for DMA errors */ |
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if (_rx_dma_status & DMA_STATUS_TEIF) { |
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perf_count(_perf_dmaerrs); |
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perf_count(_pc_dmaerrs); |
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ret = -1; |
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errno = EIO; |
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break; |
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@ -475,7 +491,7 @@ PX4IO_serial::_wait_complete()
@@ -475,7 +491,7 @@ PX4IO_serial::_wait_complete()
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uint8_t crc = _dma_buffer.crc; |
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_dma_buffer.crc = 0; |
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if (crc != crc_packet(_dma_buffer)) { |
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perf_count(_perf_crcerrs); |
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perf_count(_pc_crcerrs); |
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ret = -1; |
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errno = EIO; |
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break; |
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@ -483,7 +499,7 @@ PX4IO_serial::_wait_complete()
@@ -483,7 +499,7 @@ PX4IO_serial::_wait_complete()
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/* check packet response code */ |
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if (PKT_CODE(_dma_buffer) != PKT_CODE_SUCCESS) { |
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perf_count(_perf_protoerrs); |
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perf_count(_pc_protoerrs); |
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ret = -1; |
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errno = EIO; |
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break; |
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@ -496,7 +512,7 @@ PX4IO_serial::_wait_complete()
@@ -496,7 +512,7 @@ PX4IO_serial::_wait_complete()
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if (errno == ETIMEDOUT) { |
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/* something has broken - clear out any partial DMA state and reconfigure */ |
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_abort_dma(); |
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perf_count(_perf_timeouts); |
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perf_count(_pc_timeouts); |
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break; |
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} |
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@ -508,7 +524,7 @@ PX4IO_serial::_wait_complete()
@@ -508,7 +524,7 @@ PX4IO_serial::_wait_complete()
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_rx_dma_status = _dma_status_inactive; |
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/* update counters */ |
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perf_end(_perf_txns); |
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perf_end(_pc_txns); |
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return ret; |
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} |
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@ -542,9 +558,6 @@ PX4IO_serial::_do_rx_dma_callback(unsigned status)
@@ -542,9 +558,6 @@ PX4IO_serial::_do_rx_dma_callback(unsigned status)
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/* disable UART DMA */ |
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rCR3 &= ~(USART_CR3_DMAT | USART_CR3_DMAR); |
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/* DMA may have stopped short */ |
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_rx_length = sizeof(IOPacket) - stm32_dmaresidual(_rx_dma); |
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/* complete now */ |
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sem_post(&_completion_semaphore); |
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} |
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@ -562,15 +575,9 @@ void
@@ -562,15 +575,9 @@ void
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PX4IO_serial::_do_interrupt() |
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{ |
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uint32_t sr = rSR; /* get UART status register */ |
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(void)rDR; /* read DR to clear status */ |
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/* handle error/exception conditions */ |
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if (sr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE | USART_SR_IDLE)) { |
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/* read DR to clear status */ |
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(void)rDR; |
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} else { |
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ASSERT(0); |
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} |
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#if 0 |
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if (sr & (USART_SR_ORE | /* overrun error - packet was too big for DMA or DMA was too slow */ |
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USART_SR_NE | /* noise error - we have lost a byte due to noise */ |
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USART_SR_FE)) { /* framing error - start/stop bit lost or line break */ |
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@ -593,20 +600,21 @@ PX4IO_serial::_do_interrupt()
@@ -593,20 +600,21 @@ PX4IO_serial::_do_interrupt()
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/* don't attempt to handle IDLE if it's set - things went bad */ |
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return; |
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} |
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#endif |
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if (sr & USART_SR_IDLE) { |
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/* if there was DMA transmission still going, this is an error */ |
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if (stm32_dmaresidual(_tx_dma) != 0) { |
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/* babble from IO */ |
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_abort_dma(); |
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return; |
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} |
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/* if there is DMA reception going on, this is a short packet */ |
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if (_rx_dma_status == _dma_status_waiting) { |
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/* verify that the received packet is complete */ |
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unsigned length = sizeof(_dma_buffer) - stm32_dmaresidual(_rx_dma); |
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if ((length < 1) || (length < PKT_SIZE(_dma_buffer))) { |
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perf_count(_pc_badidle); |
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return; |
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} |
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perf_count(_pc_idle); |
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/* stop the receive DMA */ |
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stm32_dmastop(_rx_dma); |
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