diff --git a/nuttx/configs/stm32f4discovery/src/up_ssd1289.c b/nuttx/configs/stm32f4discovery/src/up_ssd1289.c
index d7f9495576..50086205c8 100644
--- a/nuttx/configs/stm32f4discovery/src/up_ssd1289.c
+++ b/nuttx/configs/stm32f4discovery/src/up_ssd1289.c
@@ -184,7 +184,7 @@ static const uint32_t g_lcdconfig[] =
 {
   /* PC6(RESET), FSMC_A16, FSMC_NOE, FSMC_NWE, and FSMC_NE1  */
 
-  GPIO_LCD_RESET, GPIO_FSMC_A16, GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NE3
+  GPIO_LCD_RESET, GPIO_FSMC_A16, GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NE1
 };
 #define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t))
 
diff --git a/nuttx/drivers/lcd/ssd1289.c b/nuttx/drivers/lcd/ssd1289.c
index 5891c6577c..5833ff145a 100644
--- a/nuttx/drivers/lcd/ssd1289.c
+++ b/nuttx/drivers/lcd/ssd1289.c
@@ -890,7 +890,7 @@ static inline void ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
 
       ssd1289_putreg(lcd, SSD1289_DSPCTRL,
                      (SSD1289_DSPCTRL_ON | SSD1289_DSPCTRL_DTE |
-                      SSD1289_DSPCTRL_GON | define SSD1289_DSPCTRL_VLE(0))); 
+                      SSD1289_DSPCTRL_GON | SSD1289_DSPCTRL_VLE(0))); 
 #endif
 
       /* Set up power control registers.  There is a lot of variability