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@ -333,8 +333,13 @@ L3GD20::init()
@@ -333,8 +333,13 @@ L3GD20::init()
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write_reg(ADDR_CTRL_REG4, REG4_BDU); |
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write_reg(ADDR_CTRL_REG5, 0); |
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write_reg(ADDR_CTRL_REG5, REG5_FIFO_ENABLE); /* disable wake-on-interrupt */ |
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write_reg(ADDR_FIFO_CTRL_REG, FIFO_CTRL_STREAM_MODE); /* Enable FIFO, old data is overwritten */ |
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write_reg(ADDR_CTRL_REG5, REG5_FIFO_ENABLE); /* disable wake-on-interrupt */ |
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/* disable FIFO. This makes things simpler and ensures we
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* aren't getting stale data. It means we must run the hrt |
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* callback fast enough to not miss data. */ |
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write_reg(ADDR_FIFO_CTRL_REG, FIFO_CTRL_BYPASS_MODE);
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set_range(500); /* default to 500dps */ |
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set_samplerate(0); /* max sample rate */ |
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