From 5aa449f226098edf61f2f2a09d8f9d9be1eb31a0 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Tue, 18 Apr 2017 16:15:02 -1000 Subject: [PATCH] nxphlite-v3:Set FRDIV to 512 to keep clock in spec --- nuttx-configs/nxphlite-v3/include/board.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/nuttx-configs/nxphlite-v3/include/board.h b/nuttx-configs/nxphlite-v3/include/board.h index 41b45a0edd..ae10936229 100644 --- a/nuttx-configs/nxphlite-v3/include/board.h +++ b/nuttx-configs/nxphlite-v3/include/board.h @@ -70,6 +70,13 @@ #define BOARD_EXTAL_FREQ 16000000 /* 16MHz Oscillator Y1 */ #define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */ +/* FLL Configuration. + * BOARD_EXTAL_FREQ / BOARD_FRDIV has to be in the range 31.25 kHz to 39.0625 + * 16 Mhz/ MCG_C1_FRDIV_DIV512 = 31.25 kHz * 640 the default for MCG_C4 + * FLL is 20Mhz + */ +#define BOARD_FRDIV MCG_C1_FRDIV_DIV512 + /* PLL Configuration. Either the external clock or crystal frequency is used to * select the PRDIV value. Only reference clock frequencies are supported that will * produce a KINETIS_MCG_PLL_REF_MIN=8MHz >= PLLIN <=KINETIS_MCG_PLL_REF_MAX=16Mhz