diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index f178635573..5c85d4bb63 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -3686,4 +3686,7 @@
 	* arch/arm/srch/stm32/stm32_otgfshost.c:  Replace timeout handling; use
 	  system tick instead of frame counter.  The frame counter gets rset to
 	  zero at 0x3fff making it error prone.
+	* arch/arm/src/stm32/stm32f20xx_rcc.c and stm32f40xx_rcc.c: Added option
+	  CONFIG_STM32_FLASH_PREFETCH.  FLASH prefetch will now only be enabled
+	  if this option is selected.
 
diff --git a/nuttx/Makefile.unix b/nuttx/Makefile.unix
index 5ecdabb643..d66c06bd82 100644
--- a/nuttx/Makefile.unix
+++ b/nuttx/Makefile.unix
@@ -34,9 +34,9 @@
 ############################################################################
 
 TOPDIR := ${shell pwd | sed -e 's/ /\\ /g'}
--include ${TOPDIR}/.config
-include ${TOPDIR}/tools/Config.mk
--include ${TOPDIR}/Make.defs
+-include $(TOPDIR)/.config
+include $(TOPDIR)/tools/Config.mk
+-include $(TOPDIR)/Make.defs
 
 # Control build verbosity
 
diff --git a/nuttx/arch/arm/src/stm32/Kconfig b/nuttx/arch/arm/src/stm32/Kconfig
index 2807e1a47a..99dde32093 100644
--- a/nuttx/arch/arm/src/stm32/Kconfig
+++ b/nuttx/arch/arm/src/stm32/Kconfig
@@ -689,6 +689,15 @@ endchoice
 
 endmenu
 
+config STM32_FLASH_PREFETCH
+	bool "Enable FLASH Pre-fetch"
+	depends on STM32_STM32F20XX || STM32_STM32F40XX
+	default n
+	---help---
+	Enable FLASH prefetch and F2 and F4 parts (FLASH pre-fetch is always enabled
+	on F1 parts).  Some early revisions of F4 parts do not support FLASH pre-fetch
+	properly and enabling this option may interfere with ADC accuracy.
+
 choice
 	prompt "JTAG Configuration"
 	default STM32_JTAG_DISABLE
diff --git a/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c
index 335992524c..ac72fb60bc 100644
--- a/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c
+++ b/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c
@@ -631,7 +631,11 @@ static void stm32_stdclockconfig(void)
 
       /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
 
+#ifdef STM32_FLASH_PREFETCH
+      regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
+#else
       regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
+#endif
       putreg32(regval, STM32_FLASH_ACR);
 
       /* Select the main PLL as system clock source */
diff --git a/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c
index 14ee1e7549..c6c0b23827 100644
--- a/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c
+++ b/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c
@@ -633,7 +633,11 @@ static void stm32_stdclockconfig(void)
  
       /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
 
+#ifdef STM32_FLASH_PREFETCH
       regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
+#else
+      regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
+#endif
       putreg32(regval, STM32_FLASH_ACR);
 
       /* Select the main PLL as system clock source */