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@ -413,6 +413,10 @@ static int io_timer_init_timer(unsigned timer)
@@ -413,6 +413,10 @@ static int io_timer_init_timer(unsigned timer)
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rCCER(timer) = 0; |
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rCCMR1(timer) = 0; |
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rCCMR2(timer) = 0; |
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rCCR1(timer) = 0; |
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rCCR2(timer) = 0; |
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rCCR3(timer) = 0; |
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rCCR4(timer) = 0; |
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rCCER(timer) = 0; |
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rDCR(timer) = 0; |
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@ -548,10 +552,11 @@ int io_timer_channel_init(unsigned channel, io_timer_channel_mode_t mode,
@@ -548,10 +552,11 @@ int io_timer_channel_init(unsigned channel, io_timer_channel_mode_t mode,
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* The beauty here is that per DocID018909 Rev 8 18.3.5 Input capture mode |
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* As soon as CCxS (in SSMRx becomes different from 00, the channel is configured |
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* in input and the TIMx_CCR1 register becomes read-only. |
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* so the next line does nothing |
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* so the next line does nothing in capture mode and initializes an PWM out to |
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* 0 |
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*/ |
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REG(timer, ccr_offset) = timer_io_channels[channel].default_value; |
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REG(timer, ccr_offset) = 0; |
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/* on PWM Out ccer_setbits is 0 */ |
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