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fmu-v3: enable DShot 

Disables RX DMA on TEL4 and IO debug serial port
sbg
Beat Küng 5 years ago
parent
82106105b7
commit
803a71928f
10 changed files with 35 additions and 12 deletions
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  1. 1
      boards/px4/fmu-v2/nuttx-config/include/board.h
  2. 2
      boards/px4/fmu-v2/nuttx-config/nsh/defconfig
  3. 2
      boards/px4/fmu-v2/src/board_config.h
  4. 17
      boards/px4/fmu-v2/src/timer_config.c
  5. 1
      boards/px4/fmu-v3/default.cmake
  6. 1
      boards/px4/fmu-v3/nuttx-config/include/board.h
  7. 2
      boards/px4/fmu-v3/nuttx-config/nsh/defconfig
  8. 2
      boards/px4/fmu-v3/nuttx-config/stackcheck/defconfig
  9. 2
      boards/px4/fmu-v3/src/board_config.h
  10. 17
      boards/px4/fmu-v3/src/timer_config.c

1
boards/px4/fmu-v2/nuttx-config/include/board.h
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@ -236,7 +236,6 @@ @@ -236,7 +236,6 @@
/* UART RX DMA configurations */
#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
/* CAN

2
boards/px4/fmu-v2/nuttx-config/nsh/defconfig
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@ -219,10 +219,8 @@ CONFIG_UART7_SERIAL_CONSOLE=y @@ -219,10 +219,8 @@ CONFIG_UART7_SERIAL_CONSOLE=y
CONFIG_UART7_TXBUFSIZE=300
CONFIG_UART8_BAUD=57600
CONFIG_UART8_RXBUFSIZE=300
CONFIG_UART8_RXDMA=y
CONFIG_UART8_TXBUFSIZE=300
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_RXDMA=y
CONFIG_USART1_TXBUFSIZE=32
CONFIG_USART2_BAUD=57600
CONFIG_USART2_IFLOWCONTROL=y

2
boards/px4/fmu-v2/src/board_config.h
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@ -468,6 +468,8 @@ @@ -468,6 +468,8 @@
#define BOARD_HAS_ON_RESET 1
#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5};
__BEGIN_DECLS
/****************************************************************************************************

17
boards/px4/fmu-v2/src/timer_config.c
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@ -60,7 +60,13 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { @@ -60,7 +60,13 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.last_channel_index = 3,
.handler = io_timer_handler0,
.vectorno = STM32_IRQ_TIM1CC,
.dshot = {
.dma_base = DSHOT_DMA2_BASE,
.channel = DShot_Channel6,
.stream = DShot_Stream5,
.start_ccr_register = TIM_DMABASE_CCR1,
.channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */
}
},
{
.base = STM32_TIM4_BASE,
@ -70,7 +76,14 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { @@ -70,7 +76,14 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.first_channel_index = 4,
.last_channel_index = 5,
.handler = io_timer_handler1,
.vectorno = STM32_IRQ_TIM4
.vectorno = STM32_IRQ_TIM4,
.dshot = {
.dma_base = DSHOT_DMA1_BASE,
.channel = DShot_Channel2,
.stream = DShot_Stream6,
.start_ccr_register = TIM_DMABASE_CCR2,
.channels_number = 2u /* CCR2 and CCR3 */
}
}
};

1
boards/px4/fmu-v3/default.cmake
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@ -27,6 +27,7 @@ px4_add_board( @@ -27,6 +27,7 @@ px4_add_board(
camera_trigger
differential_pressure # all available differential pressure drivers
distance_sensor # all available distance sensor drivers
dshot
gps
#heater
imu/adis16448

1
boards/px4/fmu-v3/nuttx-config/include/board.h
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@ -236,7 +236,6 @@ @@ -236,7 +236,6 @@
/* UART RX DMA configurations */
#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
/* CAN

2
boards/px4/fmu-v3/nuttx-config/nsh/defconfig
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@ -218,10 +218,8 @@ CONFIG_UART7_SERIAL_CONSOLE=y @@ -218,10 +218,8 @@ CONFIG_UART7_SERIAL_CONSOLE=y
CONFIG_UART7_TXBUFSIZE=300
CONFIG_UART8_BAUD=57600
CONFIG_UART8_RXBUFSIZE=300
CONFIG_UART8_RXDMA=y
CONFIG_UART8_TXBUFSIZE=300
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_RXDMA=y
CONFIG_USART1_TXBUFSIZE=32
CONFIG_USART2_BAUD=57600
CONFIG_USART2_IFLOWCONTROL=y

2
boards/px4/fmu-v3/nuttx-config/stackcheck/defconfig
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@ -212,10 +212,8 @@ CONFIG_UART7_SERIAL_CONSOLE=y @@ -212,10 +212,8 @@ CONFIG_UART7_SERIAL_CONSOLE=y
CONFIG_UART7_TXBUFSIZE=300
CONFIG_UART8_BAUD=57600
CONFIG_UART8_RXBUFSIZE=300
CONFIG_UART8_RXDMA=y
CONFIG_UART8_TXBUFSIZE=300
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_RXDMA=y
CONFIG_USART1_TXBUFSIZE=32
CONFIG_USART2_BAUD=57600
CONFIG_USART2_IFLOWCONTROL=y

2
boards/px4/fmu-v3/src/board_config.h
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@ -468,6 +468,8 @@ @@ -468,6 +468,8 @@
#define BOARD_HAS_ON_RESET 1
#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5};
__BEGIN_DECLS
/****************************************************************************************************

17
boards/px4/fmu-v3/src/timer_config.c
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@ -60,7 +60,13 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { @@ -60,7 +60,13 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.last_channel_index = 3,
.handler = io_timer_handler0,
.vectorno = STM32_IRQ_TIM1CC,
.dshot = {
.dma_base = DSHOT_DMA2_BASE,
.channel = DShot_Channel6,
.stream = DShot_Stream5,
.start_ccr_register = TIM_DMABASE_CCR1,
.channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */
}
},
{
.base = STM32_TIM4_BASE,
@ -70,7 +76,14 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { @@ -70,7 +76,14 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.first_channel_index = 4,
.last_channel_index = 5,
.handler = io_timer_handler1,
.vectorno = STM32_IRQ_TIM4
.vectorno = STM32_IRQ_TIM4,
.dshot = {
.dma_base = DSHOT_DMA1_BASE,
.channel = DShot_Channel2,
.stream = DShot_Stream6,
.start_ccr_register = TIM_DMABASE_CCR2,
.channels_number = 2u /* CCR2 and CCR3 */
}
}
};

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