From 803a71928f106ccefb453fc2bdf960fb22a63a89 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beat=20K=C3=BCng?= Date: Thu, 26 Sep 2019 18:52:47 +0200 Subject: [PATCH] fmu-v3: enable DShot Disables RX DMA on TEL4 and IO debug serial port --- boards/px4/fmu-v2/nuttx-config/include/board.h | 1 - boards/px4/fmu-v2/nuttx-config/nsh/defconfig | 2 -- boards/px4/fmu-v2/src/board_config.h | 2 ++ boards/px4/fmu-v2/src/timer_config.c | 17 +++++++++++++++-- boards/px4/fmu-v3/default.cmake | 1 + boards/px4/fmu-v3/nuttx-config/include/board.h | 1 - boards/px4/fmu-v3/nuttx-config/nsh/defconfig | 2 -- .../fmu-v3/nuttx-config/stackcheck/defconfig | 2 -- boards/px4/fmu-v3/src/board_config.h | 2 ++ boards/px4/fmu-v3/src/timer_config.c | 17 +++++++++++++++-- 10 files changed, 35 insertions(+), 12 deletions(-) diff --git a/boards/px4/fmu-v2/nuttx-config/include/board.h b/boards/px4/fmu-v2/nuttx-config/include/board.h index 4f7d4fa177..f5ce3bb6e0 100644 --- a/boards/px4/fmu-v2/nuttx-config/include/board.h +++ b/boards/px4/fmu-v2/nuttx-config/include/board.h @@ -236,7 +236,6 @@ /* UART RX DMA configurations */ -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 #define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 /* CAN diff --git a/boards/px4/fmu-v2/nuttx-config/nsh/defconfig b/boards/px4/fmu-v2/nuttx-config/nsh/defconfig index e508bfc885..05d469bf38 100644 --- a/boards/px4/fmu-v2/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v2/nuttx-config/nsh/defconfig @@ -219,10 +219,8 @@ CONFIG_UART7_SERIAL_CONSOLE=y CONFIG_UART7_TXBUFSIZE=300 CONFIG_UART8_BAUD=57600 CONFIG_UART8_RXBUFSIZE=300 -CONFIG_UART8_RXDMA=y CONFIG_UART8_TXBUFSIZE=300 CONFIG_USART1_RXBUFSIZE=128 -CONFIG_USART1_RXDMA=y CONFIG_USART1_TXBUFSIZE=32 CONFIG_USART2_BAUD=57600 CONFIG_USART2_IFLOWCONTROL=y diff --git a/boards/px4/fmu-v2/src/board_config.h b/boards/px4/fmu-v2/src/board_config.h index e2a4547dff..c960ca8666 100644 --- a/boards/px4/fmu-v2/src/board_config.h +++ b/boards/px4/fmu-v2/src/board_config.h @@ -468,6 +468,8 @@ #define BOARD_HAS_ON_RESET 1 +#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5}; + __BEGIN_DECLS /**************************************************************************************************** diff --git a/boards/px4/fmu-v2/src/timer_config.c b/boards/px4/fmu-v2/src/timer_config.c index 492400eb26..4d9f7e8524 100644 --- a/boards/px4/fmu-v2/src/timer_config.c +++ b/boards/px4/fmu-v2/src/timer_config.c @@ -60,7 +60,13 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { .last_channel_index = 3, .handler = io_timer_handler0, .vectorno = STM32_IRQ_TIM1CC, - + .dshot = { + .dma_base = DSHOT_DMA2_BASE, + .channel = DShot_Channel6, + .stream = DShot_Stream5, + .start_ccr_register = TIM_DMABASE_CCR1, + .channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */ + } }, { .base = STM32_TIM4_BASE, @@ -70,7 +76,14 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { .first_channel_index = 4, .last_channel_index = 5, .handler = io_timer_handler1, - .vectorno = STM32_IRQ_TIM4 + .vectorno = STM32_IRQ_TIM4, + .dshot = { + .dma_base = DSHOT_DMA1_BASE, + .channel = DShot_Channel2, + .stream = DShot_Stream6, + .start_ccr_register = TIM_DMABASE_CCR2, + .channels_number = 2u /* CCR2 and CCR3 */ + } } }; diff --git a/boards/px4/fmu-v3/default.cmake b/boards/px4/fmu-v3/default.cmake index 3e1b9ef3a7..92ae0f02f3 100644 --- a/boards/px4/fmu-v3/default.cmake +++ b/boards/px4/fmu-v3/default.cmake @@ -27,6 +27,7 @@ px4_add_board( camera_trigger differential_pressure # all available differential pressure drivers distance_sensor # all available distance sensor drivers + dshot gps #heater imu/adis16448 diff --git a/boards/px4/fmu-v3/nuttx-config/include/board.h b/boards/px4/fmu-v3/nuttx-config/include/board.h index be9b54dc24..45beb07129 100644 --- a/boards/px4/fmu-v3/nuttx-config/include/board.h +++ b/boards/px4/fmu-v3/nuttx-config/include/board.h @@ -236,7 +236,6 @@ /* UART RX DMA configurations */ -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 #define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 /* CAN diff --git a/boards/px4/fmu-v3/nuttx-config/nsh/defconfig b/boards/px4/fmu-v3/nuttx-config/nsh/defconfig index b5076f9aa0..1403ec0b5f 100644 --- a/boards/px4/fmu-v3/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v3/nuttx-config/nsh/defconfig @@ -218,10 +218,8 @@ CONFIG_UART7_SERIAL_CONSOLE=y CONFIG_UART7_TXBUFSIZE=300 CONFIG_UART8_BAUD=57600 CONFIG_UART8_RXBUFSIZE=300 -CONFIG_UART8_RXDMA=y CONFIG_UART8_TXBUFSIZE=300 CONFIG_USART1_RXBUFSIZE=128 -CONFIG_USART1_RXDMA=y CONFIG_USART1_TXBUFSIZE=32 CONFIG_USART2_BAUD=57600 CONFIG_USART2_IFLOWCONTROL=y diff --git a/boards/px4/fmu-v3/nuttx-config/stackcheck/defconfig b/boards/px4/fmu-v3/nuttx-config/stackcheck/defconfig index 44feff2fc3..af8d087b80 100644 --- a/boards/px4/fmu-v3/nuttx-config/stackcheck/defconfig +++ b/boards/px4/fmu-v3/nuttx-config/stackcheck/defconfig @@ -212,10 +212,8 @@ CONFIG_UART7_SERIAL_CONSOLE=y CONFIG_UART7_TXBUFSIZE=300 CONFIG_UART8_BAUD=57600 CONFIG_UART8_RXBUFSIZE=300 -CONFIG_UART8_RXDMA=y CONFIG_UART8_TXBUFSIZE=300 CONFIG_USART1_RXBUFSIZE=128 -CONFIG_USART1_RXDMA=y CONFIG_USART1_TXBUFSIZE=32 CONFIG_USART2_BAUD=57600 CONFIG_USART2_IFLOWCONTROL=y diff --git a/boards/px4/fmu-v3/src/board_config.h b/boards/px4/fmu-v3/src/board_config.h index 4d305940d8..615abec001 100644 --- a/boards/px4/fmu-v3/src/board_config.h +++ b/boards/px4/fmu-v3/src/board_config.h @@ -468,6 +468,8 @@ #define BOARD_HAS_ON_RESET 1 +#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5}; + __BEGIN_DECLS /**************************************************************************************************** diff --git a/boards/px4/fmu-v3/src/timer_config.c b/boards/px4/fmu-v3/src/timer_config.c index 492400eb26..4d9f7e8524 100644 --- a/boards/px4/fmu-v3/src/timer_config.c +++ b/boards/px4/fmu-v3/src/timer_config.c @@ -60,7 +60,13 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { .last_channel_index = 3, .handler = io_timer_handler0, .vectorno = STM32_IRQ_TIM1CC, - + .dshot = { + .dma_base = DSHOT_DMA2_BASE, + .channel = DShot_Channel6, + .stream = DShot_Stream5, + .start_ccr_register = TIM_DMABASE_CCR1, + .channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */ + } }, { .base = STM32_TIM4_BASE, @@ -70,7 +76,14 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { .first_channel_index = 4, .last_channel_index = 5, .handler = io_timer_handler1, - .vectorno = STM32_IRQ_TIM4 + .vectorno = STM32_IRQ_TIM4, + .dshot = { + .dma_base = DSHOT_DMA1_BASE, + .channel = DShot_Channel2, + .stream = DShot_Stream6, + .start_ccr_register = TIM_DMABASE_CCR2, + .channels_number = 2u /* CCR2 and CCR3 */ + } } };