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@ -362,7 +362,7 @@ private:
@@ -362,7 +362,7 @@ private:
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* @param max_g The maximum G value the range must support. |
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* @return OK if the value can be supported, -ERANGE otherwise. |
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*/ |
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int set_range(unsigned max_g); |
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int set_accel_range(unsigned max_g); |
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/**
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* Swap a 16-bit value read from the MPU6000 to native byte order. |
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@ -717,37 +717,7 @@ int MPU6000::reset()
@@ -717,37 +717,7 @@ int MPU6000::reset()
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_gyro_range_scale = (0.0174532 / 16.4);//1.0f / (32768.0f * (2000.0f / 180.0f) * M_PI_F);
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_gyro_range_rad_s = (2000.0f / 180.0f) * M_PI_F; |
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// product-specific scaling
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switch (_product) { |
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case MPU6000ES_REV_C4: |
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case MPU6000ES_REV_C5: |
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case MPU6000_REV_C4: |
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case MPU6000_REV_C5: |
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// Accel scale 8g (4096 LSB/g)
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// Rev C has different scaling than rev D
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write_checked_reg(MPUREG_ACCEL_CONFIG, 1 << 3); |
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break; |
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case MPU6000ES_REV_D6: |
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case MPU6000ES_REV_D7: |
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case MPU6000ES_REV_D8: |
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case MPU6000_REV_D6: |
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case MPU6000_REV_D7: |
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case MPU6000_REV_D8: |
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case MPU6000_REV_D9: |
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case MPU6000_REV_D10: |
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// default case to cope with new chip revisions, which
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// presumably won't have the accel scaling bug
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default: |
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// Accel scale 8g (4096 LSB/g)
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write_checked_reg(MPUREG_ACCEL_CONFIG, 2 << 3); |
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break; |
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} |
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// Correct accel scale factors of 4096 LSB/g
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// scale to m/s^2 ( 1g = 9.81 m/s^2)
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_accel_range_scale = (MPU6000_ONE_G / 4096.0f); |
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_accel_range_m_s2 = 8.0f * MPU6000_ONE_G; |
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set_accel_range(8); |
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usleep(1000); |
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@ -1301,11 +1271,8 @@ MPU6000::ioctl(struct file *filp, int cmd, unsigned long arg)
@@ -1301,11 +1271,8 @@ MPU6000::ioctl(struct file *filp, int cmd, unsigned long arg)
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return OK; |
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case ACCELIOCSRANGE: |
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/* XXX not implemented */ |
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// XXX change these two values on set:
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// _accel_range_scale = (9.81f / 4096.0f);
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// _accel_range_m_s2 = 8.0f * 9.81f;
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return -EINVAL; |
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return set_accel_range(arg); |
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case ACCELIOCGRANGE: |
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return (unsigned long)((_accel_range_m_s2)/MPU6000_ONE_G + 0.5f); |
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@ -1455,44 +1422,46 @@ MPU6000::write_checked_reg(unsigned reg, uint8_t value)
@@ -1455,44 +1422,46 @@ MPU6000::write_checked_reg(unsigned reg, uint8_t value)
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} |
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int |
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MPU6000::set_range(unsigned max_g) |
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MPU6000::set_accel_range(unsigned max_g_in) |
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{ |
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#if 0 |
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uint8_t rangebits; |
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float rangescale; |
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if (max_g > 16) { |
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return -ERANGE; |
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} else if (max_g > 8) { /* 16G */ |
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rangebits = OFFSET_LSB1_RANGE_16G; |
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rangescale = 1.98; |
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} else if (max_g > 4) { /* 8G */ |
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rangebits = OFFSET_LSB1_RANGE_8G; |
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rangescale = 0.99; |
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} else if (max_g > 3) { /* 4G */ |
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rangebits = OFFSET_LSB1_RANGE_4G; |
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rangescale = 0.5; |
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} else if (max_g > 2) { /* 3G */ |
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rangebits = OFFSET_LSB1_RANGE_3G; |
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rangescale = 0.38; |
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} else if (max_g > 1) { /* 2G */ |
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rangebits = OFFSET_LSB1_RANGE_2G; |
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rangescale = 0.25; |
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} else { /* 1G */ |
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rangebits = OFFSET_LSB1_RANGE_1G; |
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rangescale = 0.13; |
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// workaround for bugged versions of MPU6k (rev C)
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switch (_product) { |
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case MPU6000ES_REV_C4: |
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case MPU6000ES_REV_C5: |
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case MPU6000_REV_C4: |
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case MPU6000_REV_C5: |
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write_checked_reg(MPUREG_ACCEL_CONFIG, 1 << 3); |
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_accel_range_scale = (MPU6000_ONE_G / 4096.0f); |
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_accel_range_m_s2 = 8.0f * MPU6000_ONE_G; |
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return OK; |
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} |
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/* adjust sensor configuration */ |
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modify_reg(ADDR_OFFSET_LSB1, OFFSET_LSB1_RANGE_MASK, rangebits); |
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_range_scale = rangescale; |
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#endif |
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uint8_t afs_sel; |
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float lsb_per_g; |
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float max_accel_g; |
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if (max_g_in > 8) { // 16g - AFS_SEL = 3
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afs_sel = 3; |
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lsb_per_g = 2048; |
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max_accel_g = 16; |
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} else if (max_g_in > 4) { // 8g - AFS_SEL = 2
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afs_sel = 2; |
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lsb_per_g = 4096; |
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max_accel_g = 8; |
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} else if (max_g_in > 2) { // 4g - AFS_SEL = 1
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afs_sel = 1; |
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lsb_per_g = 8192; |
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max_accel_g = 4; |
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} else { // 2g - AFS_SEL = 0
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afs_sel = 0; |
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lsb_per_g = 16384; |
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max_accel_g = 2; |
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} |
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write_checked_reg(MPUREG_ACCEL_CONFIG, afs_sel << 3); |
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_accel_range_scale = (MPU6000_ONE_G / lsb_per_g); |
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_accel_range_m_s2 = max_accel_g * MPU6000_ONE_G; |
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return OK; |
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} |
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