STM32 Kconfig looks good. STM32 external ram configuration changed.

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5100 7fd9a85b-ad96-42d3-883c-3090e2eb8679
13 years ago · 97da506c0c
59 changed files with 145 additions and 424 deletions
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@ -3263,4 +3263,8 @@
				@@ -3263,4 +3263,8 @@
 	* Kconfig: Refactor serial settings (moved from chip to drivers/serial).
 	  AVR "teensy" now builds with Kconfig (contributed by Richard Cochran).
 	* Kconfig: Add configuration settings for the LPC17xx
-	* Kconfig: Add configuratino settings for the LM3S (from Richard Cochran).
+	* Kconfig: Add configuration settings for the LM3S (from Richard Cochran).
+	* Kconfig: Verify configuration settings for the STM32.  This include
+	  changes in the way that the external SRAM is configured:  Define
+	  CONFIG_HEAP2_SIZE (decimal) instead of CONFIG_HEAP2_END (hex).
+
--- a/nuttx/arch/Kconfig
+++ b/nuttx/arch/Kconfig
@ -58,11 +58,13 @@ config ARCH_X86
				@@ -58,11 +58,13 @@ config ARCH_X86

 config ARCH_Z16
 	bool "ZNEO"
+	select ARCH_HAVE_HEAP2
 	---help---
 		ZiLOG ZNEO 16-bit architectures (z16f).

 config ARCH_Z80
 	bool "z80"
+	select ARCH_HAVE_HEAP2
 	---help---
 		ZiLOG 8-bit architectures (z80, ez80, z8).

--- a/nuttx/arch/arm/Kconfig
+++ b/nuttx/arch/arm/Kconfig
@ -17,6 +17,7 @@ config ARCH_CHIP_C5471
				@@ -17,6 +17,7 @@ config ARCH_CHIP_C5471
 config ARCH_CHIP_CALYPSO
 	bool "Calypso"
 	select ARCH_ARM7TDMI
+	select ARCH_HAVE_HEAP2
 	---help---
 		TI Calypso-based cell phones (ARM7TDMI)

@ -29,6 +30,7 @@ config ARCH_CHIP_DM320
				@@ -29,6 +30,7 @@ config ARCH_CHIP_DM320
 config ARCH_CHIP_IMX
 	bool "Freescale iMX"
 	select ARCH_ARM920T
+	select ARCH_HAVE_HEAP2
 	---help---
 		Freescale iMX architectures (ARM920T)

--- a/nuttx/arch/arm/src/calypso/calypso_heap.c
+++ b/nuttx/arch/arm/src/calypso/calypso_heap.c
@ -37,6 +37,10 @@
				@@ -37,6 +37,10 @@
 *
 ****************************************************************************/

+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
 #include <nuttx/config.h>
 #include <nuttx/mm.h>

@ -52,6 +56,14 @@
				@@ -52,6 +56,14 @@
 #include "up_arch.h"
 #include "up_internal.h"

+/****************************************************************************
+ * Preprocessor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
 /****************************************************************************
 * Name: up_addregion
 *
@ -84,7 +96,7 @@ void up_addregion(void)
				@@ -84,7 +96,7 @@ void up_addregion(void)
  /* Configure the RHEA bridge with some sane default values */
  calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);

-  mm_addregion((FAR void*)CONFIG_HEAP2_START, CONFIG_HEAP2_END-CONFIG_HEAP2_START);
+  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);

 }
 #endif
--- a/nuttx/arch/arm/src/imx/imx_allocateheap.c
+++ b/nuttx/arch/arm/src/imx/imx_allocateheap.c
@ -111,8 +111,8 @@ void up_addregion(void)
				@@ -111,8 +111,8 @@ void up_addregion(void)

  /* Check for any additional memory regions */

-#if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END)
-  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
+#if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_SIZE)
+  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
 #endif
 }
 #endif
--- a/nuttx/arch/arm/src/stm32/Kconfig
+++ b/nuttx/arch/arm/src/stm32/Kconfig
@ -84,7 +84,42 @@ config STM32_STM32F20XX
				@@ -84,7 +84,42 @@ config STM32_STM32F20XX

 config STM32_STM32F40XX
 	bool
-	default y if ARCH_CHIP_STM32F405RG || ARCH_CHIP_STM32F405VG || ARCH_CHIP_STM32F405ZG || ARCH_CHIP_STM32F407VE || ARCH_CHIP_STM32F407VG || ARCH_CHIP_STM32F407ZE || ARCH_CHIP_STM32F407ZG || ARCH_CHIP_STM32F407IE || ARCH_CHIP_STM32F407IE
+	default y if ARCH_CHIP_STM32F405RG || ARCH_CHIP_STM32F405VG || ARCH_CHIP_STM32F405ZG || ARCH_CHIP_STM32F407VE || ARCH_CHIP_STM32F407VG || ARCH_CHIP_STM32F407ZE || ARCH_CHIP_STM32F407ZG || ARCH_CHIP_STM32F407IE || ARCH_CHIP_STM32F407IG
+
+choice
+	prompt "Toolchain Selection"
+	default STM32_CODESOURCERYW
+	depends on ARCH_CHIP_STM32
+
+config STM32_CODESOURCERYW
+	bool "CodeSourcery for Windows"
+
+config STM32_CODESOURCERYL
+	bool "CodeSourcery for Linux"
+
+config STM32_ATOLLIC_LITE
+	bool "Atollic Lite for Windows"
+
+config STM32_ATOLLIC_PRO
+	bool "Atollic Pro for Windows"
+
+config STM32_DEVKITARM
+	bool "DevkitARM (Windows)"
+
+config STM32_RAISONANCE
+	bool "STMicro Raisonance for Windows"
+
+config STM32_BUILDROOT
+	bool "NuttX buildroot (Cygwin or Linux)"
+
+endchoice
+
+config STM32_DFU
+	bool "DFU bootloader"
+	default n
+	---help---
+		Configure and position code for use with the STMicro DFU bootloader.  Do
+		not select this option if you will load code using JTAG/SWM.

 menu "STM32 Peripheral Support"

@ -228,7 +263,7 @@ config STM32_SPI4
				@@ -228,7 +263,7 @@ config STM32_SPI4

 config STM32_SYSCFG
 	bool "SYSCFG"
-	default n
+	default y
 	depends on STM32_STM32F20XX || STM32_STM32F40XX

 config STM32_TIM1
@ -517,24 +552,11 @@ config STM32_CCMEXCLUDE
				@@ -517,24 +552,11 @@ config STM32_CCMEXCLUDE
 config STM32_FSMC_SRAM
 	bool "External SRAM on FSMC"
 	default n
-	depends on FSMC
+	depends on STM32_FSMC
+	select ARCH_HAVE_HEAP2
 	---help---
 		In addition to internal SRAM, SRAM may also be available through the FSMC.

-config HEAP2_BASE
-	hex "FSMC SRAM base address"
-	default 0x00000000
-	depends on STM32_FSMC_SRAM
-	---help---
-		The base address of the SRAM in the FSMC address space.
-
-config HEAP2_END
-	hex "FSMC SRAM end+1 address"
-	default 0x00000000
-	depends on STM32_FSMC_SRAM
-	---help---
-		The end (+1) of the SRAM in the FSMC address space
-
 config STM32_TIM1_PWM
 	bool "TIM1 PWM"
 	default n
@ -1536,6 +1558,7 @@ config STM32_PHYADDR
				@@ -1536,6 +1558,7 @@ config STM32_PHYADDR
 config STM32_MII
 	bool "Use MII interface"
 	default n
+	depends on STM32_ETHMAC
 	---help---
 		Support Ethernet MII interface.

@ -1549,13 +1572,14 @@ config STM32_MII_MCO2
				@@ -1549,13 +1572,14 @@ config STM32_MII_MCO2
 config STM32_AUTONEG
 	bool "Use autonegtiation"
 	default y
+	depends on STM32_ETHMAC
 	---help---
 		Use PHY autonegotion to determine speed and mode

 config STM32_ETHFD
 	bool "Full duplex"
 	default n
-	depends on !STM32_AUTONEG
+	depends on STM32_ETHMAC && !STM32_AUTONEG
 	---help---
 		If STM32_AUTONEG is not defined, then this may be defined to select full duplex
 		mode. Default: half-duplex
@ -1563,7 +1587,7 @@ config STM32_ETHFD
				@@ -1563,7 +1587,7 @@ config STM32_ETHFD
 config STM32_ETH100MBPS
 	bool "100 Mbps"
 	default n
-	depends on !STM32_AUTONEG
+	depends on STM32_ETHMAC && !STM32_AUTONEG
 	---help---
 		If STM32_AUTONEG is not defined, then this may be defined to select 100 MBps
 		speed.  Default: 10 Mbps
@ -1607,6 +1631,7 @@ config STM32_PHYSR_FULLDUPLEX
				@@ -1607,6 +1631,7 @@ config STM32_PHYSR_FULLDUPLEX
 config STM32_ETH_PTP
 	bool "Precision Time Protocol (PTP)"
 	default n
+	depends on STM32_ETHMAC
 	---help---
 		Precision Time Protocol (PTP).  Not supported but some hooks are indicated
 		with this condition.
@ -1616,6 +1641,7 @@ endmenu
				@@ -1616,6 +1641,7 @@ endmenu
 config STM32_RMII
 	bool
 	default y if !STM32_MII
+	depends on STM32_ETHMAC

 config STM32_MII_MCO1
 	bool
--- a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
+++ b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
@ -73,13 +73,14 @@
				@@ -73,13 +73,14 @@
 *
 * CONFIG_STM32_FSMC=y        : Enables the FSMC
 * CONFIG_STM32_FSMC_SRAM=y   : Indicates that SRAM is available via the
- *   FSMC (as opposed to an LCD or FLASH).
+ *                              FSMC (as opposed to an LCD or FLASH).
 * CONFIG_HEAP2_BASE          : The base address of the SRAM in the FSMC
- *   address space
- * CONFIG_HEAP2_END           : The end (+1) of the SRAM in the FSMC
- *   address space
+ *                              address space
+ * CONFIG_HEAP2_SIZE          : The size of the SRAM in the FSMC
+ *                              address space
 * CONFIG_MM_REGIONS          : Must be set to a large enough value to
- *   include the FSMC SRAM (as determined by the rules provided below)
+ *                              include the FSMC SRAM (as determined by
+ *                              the rules provided below)
 */

 #ifndef CONFIG_STM32_FSMC
@ -256,12 +257,12 @@
				@@ -256,12 +257,12 @@

 /* If FSMC SRAM is going to be used as heap, then verify that the starting
 * address and size of the external SRAM region has been provided in the
- * configuration (as CONFIG_HEAP2_BASE and CONFIG_HEAP2_END).
+ * configuration (as CONFIG_HEAP2_BASE and CONFIG_HEAP2_SIZE).
 */

 #ifdef CONFIG_STM32_FSMC_SRAM
-#  if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_END)
-#    error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_END must be provided"
+#  if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_SIZE)
+#    error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_SIZE must be provided"
 #    undef CONFIG_STM32_FSMC_SRAM
 #  endif
 #endif
@ -317,7 +318,7 @@ void up_addregion(void)
				@@ -317,7 +318,7 @@ void up_addregion(void)
   /* Add the external FSMC SRAM heap region. */

 #ifdef CONFIG_STM32_FSMC_SRAM
-   mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
+   mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
 #endif
 }
 #endif
--- a/nuttx/arch/z16/src/common/up_allocateheap.c
+++ b/nuttx/arch/z16/src/common/up_allocateheap.c
@ -107,6 +107,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
				@@ -107,6 +107,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
 #if CONFIG_MM_REGIONS > 1
 void up_addregion(void)
 {
-  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
+  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
 }
 #endif
--- a/nuttx/arch/z80/src/common/up_allocateheap.c
+++ b/nuttx/arch/z80/src/common/up_allocateheap.c
@ -109,6 +109,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
				@@ -109,6 +109,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
 #if CONFIG_MM_REGIONS > 1
 void up_addregion(void)
 {
-  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
+  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
 }
 #endif
--- a/nuttx/configs/compal_e99/nsh_compalram/defconfig
+++ b/nuttx/configs/compal_e99/nsh_compalram/defconfig
@ -45,8 +45,8 @@ CONFIG_ARCH_BOARD_COMPALE99=y
				@@ -45,8 +45,8 @@ CONFIG_ARCH_BOARD_COMPALE99=y
 CONFIG_BOARD_LOOPSPERMSEC=1250
 CONFIG_ROM_VECTORS=n
 CONFIG_MM_REGIONS=2
-CONFIG_HEAP2_START=0x01000000
-CONFIG_HEAP2_END=0x01200000
+CONFIG_HEAP2_BASE=0x01000000
+CONFIG_HEAP2_SIZE=2097152
 CONFIG_ARCH_LEDS=n
 CONFIG_ARCH_INTERRUPTSTACK=1024
 CONFIG_ARCH_STACKDUMP=y
--- a/nuttx/configs/compal_e99/nsh_highram/defconfig
+++ b/nuttx/configs/compal_e99/nsh_highram/defconfig
@ -45,8 +45,8 @@ CONFIG_ARCH_BOARD_COMPALE99=y
				@@ -45,8 +45,8 @@ CONFIG_ARCH_BOARD_COMPALE99=y
 CONFIG_BOARD_LOOPSPERMSEC=1250
 CONFIG_ROM_VECTORS=n
 CONFIG_MM_REGIONS=2
-CONFIG_HEAP2_START=0x01000000
-CONFIG_HEAP2_END=0x01200000
+CONFIG_HEAP2_BASE=0x01000000
+CONFIG_HEAP2_SIZE=2097152
 CONFIG_ARCH_LEDS=n
 CONFIG_ARCH_INTERRUPTSTACK=1024
 CONFIG_ARCH_STACKDUMP=y
--- a/nuttx/configs/hymini-stm32v/buttons/defconfig
+++ b/nuttx/configs/hymini-stm32v/buttons/defconfig
@ -155,14 +155,6 @@ CONFIG_USART3_2STOP=0
				@@ -155,14 +155,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=y
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/hymini-stm32v/nsh/defconfig
+++ b/nuttx/configs/hymini-stm32v/nsh/defconfig
@ -153,14 +153,6 @@ CONFIG_USART3_2STOP=0
				@@ -153,14 +153,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103V specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/hymini-stm32v/nsh2/defconfig
+++ b/nuttx/configs/hymini-stm32v/nsh2/defconfig
@ -158,14 +158,6 @@ CONFIG_USART3_2STOP=0
				@@ -158,14 +158,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/hymini-stm32v/nx/defconfig
+++ b/nuttx/configs/hymini-stm32v/nx/defconfig
@ -153,14 +153,6 @@ CONFIG_USART3_2STOP=0
				@@ -153,14 +153,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103V specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/hymini-stm32v/nxlines/defconfig
+++ b/nuttx/configs/hymini-stm32v/nxlines/defconfig
@ -157,14 +157,6 @@ CONFIG_USART3_2STOP=0
				@@ -157,14 +157,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103V specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/hymini-stm32v/usbserial/defconfig
+++ b/nuttx/configs/hymini-stm32v/usbserial/defconfig
@ -155,14 +155,6 @@ CONFIG_USART3_2STOP=0
				@@ -155,14 +155,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103V specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/hymini-stm32v/usbstorage/defconfig
+++ b/nuttx/configs/hymini-stm32v/usbstorage/defconfig
@ -154,14 +154,6 @@ CONFIG_USART3_2STOP=0
				@@ -154,14 +154,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103V specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/kwikstik-k40/ostest/defconfig
+++ b/nuttx/configs/kwikstik-k40/ostest/defconfig
@ -165,14 +165,6 @@ CONFIG_UART3_PARITY=0
				@@ -165,14 +165,6 @@ CONFIG_UART3_PARITY=0
 CONFIG_UART4_PARITY=0
 CONFIG_UART5_PARITY=0

-#
-# K40X256VLQ100 specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/olimex-stm32-p107/nsh/defconfig
+++ b/nuttx/configs/olimex-stm32-p107/nsh/defconfig
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
				@@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/olimex-stm32-p107/ostest/defconfig
+++ b/nuttx/configs/olimex-stm32-p107/ostest/defconfig
@ -185,14 +185,6 @@ CONFIG_USART3_2STOP=0
				@@ -185,14 +185,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=y
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/README.txt
+++ b/nuttx/configs/stm3210e-eval/README.txt
@ -362,7 +362,7 @@ The on-board SRAM can be configured by setting
				@@ -362,7 +362,7 @@ The on-board SRAM can be configured by setting
  CONFIG_STM32_FSMC=y                         : Enables the FSMC
  CONFIG_STM32_FSMC_SRAM=y                    : Enable external SRAM support
  CONFIG_HEAP2_BASE=0x68000000                : SRAM will be located at 0x680000000
-  CONFIG_HEAP2_END=(0x68000000+(1*1024*1024)) : The size of the SRAM is 1Mbyte
+  CONFIG_HEAP2_SIZE=1048576                   : The size of the SRAM is 1Mbyte
  CONFIG_MM_REGIONS=2                         : There will be two memory regions
                                              : in the heap

--- a/nuttx/configs/stm3210e-eval/RIDE/defconfig
+++ b/nuttx/configs/stm3210e-eval/RIDE/defconfig
@ -151,14 +151,6 @@ CONFIG_USART3_2STOP=0
				@@ -151,14 +151,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/buttons/defconfig
+++ b/nuttx/configs/stm3210e-eval/buttons/defconfig
@ -162,14 +162,6 @@ CONFIG_USART3_2STOP=0
				@@ -162,14 +162,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=y
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/composite/defconfig
+++ b/nuttx/configs/stm3210e-eval/composite/defconfig
@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
				@@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/nsh/defconfig
+++ b/nuttx/configs/stm3210e-eval/nsh/defconfig
@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
				@@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/nsh2/defconfig
+++ b/nuttx/configs/stm3210e-eval/nsh2/defconfig
@ -181,14 +181,6 @@ CONFIG_USART3_2STOP=0
				@@ -181,14 +181,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/nx/defconfig
+++ b/nuttx/configs/stm3210e-eval/nx/defconfig
@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
				@@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/nxconsole/defconfig
+++ b/nuttx/configs/stm3210e-eval/nxconsole/defconfig
@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
				@@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/nxlines/defconfig
+++ b/nuttx/configs/stm3210e-eval/nxlines/defconfig
@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
				@@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/nxtext/defconfig
+++ b/nuttx/configs/stm3210e-eval/nxtext/defconfig
@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
				@@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/ostest/defconfig
+++ b/nuttx/configs/stm3210e-eval/ostest/defconfig
@ -161,14 +161,6 @@ CONFIG_USART3_2STOP=0
				@@ -161,14 +161,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/pm/defconfig
+++ b/nuttx/configs/stm3210e-eval/pm/defconfig
@ -191,14 +191,6 @@ CONFIG_USART3_2STOP=0
				@@ -191,14 +191,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/usbserial/defconfig
+++ b/nuttx/configs/stm3210e-eval/usbserial/defconfig
@ -161,14 +161,6 @@ CONFIG_USART3_2STOP=0
				@@ -161,14 +161,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3210e-eval/usbstorage/defconfig
+++ b/nuttx/configs/stm3210e-eval/usbstorage/defconfig
@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
				@@ -160,14 +160,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM3210E-EVAL specific LCD settings
 #
--- a/nuttx/configs/stm3220g-eval/README.txt
+++ b/nuttx/configs/stm3220g-eval/README.txt
@ -352,7 +352,7 @@ The on-board SRAM can be configured by setting
				@@ -352,7 +352,7 @@ The on-board SRAM can be configured by setting
  CONFIG_STM32_FSMC=y
  CONFIG_STM32_FSMC_SRAM=y
  CONFIG_HEAP2_BASE=0x64000000
-  CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
+  CONFIG_HEAP2_SIZE=2097152
  CONFIG_MM_REGIONS=2

 Configuration Options
@ -368,7 +368,7 @@ NuttX configuration file:
				@@ -368,7 +368,7 @@ NuttX configuration file:
                               FSMC (as opposed to an LCD or FLASH).
  CONFIG_HEAP2_BASE          : The base address of the SRAM in the FSMC
                               address space
-  CONFIG_HEAP2_END           : The end (+1) of the SRAM in the FSMC
+  CONFIG_HEAP2_SIZE          : The size of the SRAM in the FSMC
                               address space
  CONFIG_MM_REGIONS          : Must be set to a large enough value to
                               include the FSMC SRAM
@ -475,9 +475,9 @@ STM3220G-EVAL-specific Configuration Options
				@@ -475,9 +475,9 @@ STM3220G-EVAL-specific Configuration Options
    CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the
      FSMC (as opposed to an LCD or FLASH).

-    CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
+    CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex)

-    CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
+    CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal)

    CONFIG_ARCH_IRQPRIO - The STM3220xxx supports interrupt prioritization

--- a/nuttx/configs/stm3220g-eval/dhcpd/defconfig
+++ b/nuttx/configs/stm3220g-eval/dhcpd/defconfig
@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
				@@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F20xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F20xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3220g-eval/nettest/defconfig
+++ b/nuttx/configs/stm3220g-eval/nettest/defconfig
@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
				@@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F20xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F20xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3220g-eval/nsh/defconfig
+++ b/nuttx/configs/stm3220g-eval/nsh/defconfig
@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
				@@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F20xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F20xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3220g-eval/nsh2/defconfig
+++ b/nuttx/configs/stm3220g-eval/nsh2/defconfig
@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
				@@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F20xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F20xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3220g-eval/nxwm/defconfig
+++ b/nuttx/configs/stm3220g-eval/nxwm/defconfig
@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=n
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
				@@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F20xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F20xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3220g-eval/ostest/defconfig
+++ b/nuttx/configs/stm3220g-eval/ostest/defconfig
@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
				@@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F20xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F20xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3220g-eval/telnetd/defconfig
+++ b/nuttx/configs/stm3220g-eval/telnetd/defconfig
@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -78,7 +78,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
				@@ -183,14 +183,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F20xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F20xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3240g-eval/README.txt
+++ b/nuttx/configs/stm3240g-eval/README.txt
@ -451,7 +451,7 @@ The on-board SRAM can be configured by setting
				@@ -451,7 +451,7 @@ The on-board SRAM can be configured by setting
  CONFIG_STM32_FSMC=y
  CONFIG_STM32_FSMC_SRAM=y
  CONFIG_HEAP2_BASE=0x64000000
-  CONFIG_HEAP2_END=(0x64000000+(2*1024*1024))
+  CONFIG_HEAP2_SIZE=2097152
  CONFIG_MM_REGIONS=2 (or =3, see below)

 Configuration Options
@ -472,7 +472,7 @@ present in the NuttX configuration file:
				@@ -472,7 +472,7 @@ present in the NuttX configuration file:
                               FSMC (as opposed to an LCD or FLASH).
  CONFIG_HEAP2_BASE          : The base address of the SRAM in the FSMC
                               address space
-  CONFIG_HEAP2_END           : The end (+1) of the SRAM in the FSMC
+  CONFIG_HEAP2_SIZE          : The size of the SRAM in the FSMC
                               address space
  CONFIG_MM_REGIONS          : Must be set to a large enough value to
                               include the FSMC SRAM
@ -591,9 +591,9 @@ STM3240G-EVAL-specific Configuration Options
				@@ -591,9 +591,9 @@ STM3240G-EVAL-specific Configuration Options
    CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the
      FSMC (as opposed to an LCD or FLASH).

-    CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
+    CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex)

-    CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
+    CONFIG_HEAP2_END - The size of the SRAM in the FSMC address space (decimal)

    CONFIG_ARCH_IRQPRIO - The STM3240xxx supports interrupt prioritization

--- a/nuttx/configs/stm3240g-eval/dhcpd/defconfig
+++ b/nuttx/configs/stm3240g-eval/dhcpd/defconfig
@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
				@@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3240g-eval/nettest/defconfig
+++ b/nuttx/configs/stm3240g-eval/nettest/defconfig
@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
				@@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3240g-eval/nsh/defconfig
+++ b/nuttx/configs/stm3240g-eval/nsh/defconfig
@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
				@@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3240g-eval/nsh2/defconfig
+++ b/nuttx/configs/stm3240g-eval/nsh2/defconfig
@ -84,7 +84,7 @@ CONFIG_STM32_CCMEXCLUDE=y
				@@ -84,7 +84,7 @@ CONFIG_STM32_CCMEXCLUDE=y
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -190,14 +190,6 @@ CONFIG_USART3_2STOP=0
				@@ -190,14 +190,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3240g-eval/nxconsole/defconfig
+++ b/nuttx/configs/stm3240g-eval/nxconsole/defconfig
@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
				@@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3240g-eval/nxwm/defconfig
+++ b/nuttx/configs/stm3240g-eval/nxwm/defconfig
@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=n
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
				@@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3240g-eval/ostest/defconfig
+++ b/nuttx/configs/stm3240g-eval/ostest/defconfig
@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
				@@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3240g-eval/telnetd/defconfig
+++ b/nuttx/configs/stm3240g-eval/telnetd/defconfig
@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
				@@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm3240g-eval/webserver/defconfig
+++ b/nuttx/configs/stm3240g-eval/webserver/defconfig
@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
				@@ -83,7 +83,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=n
 #
 CONFIG_STM32_FSMC_SRAM=y
 CONFIG_HEAP2_BASE=0x64000000
-CONFIG_HEAP2_END=0x64200000
+CONFIG_HEAP2_SIZE=2097152
  
 #
 # Individual subsystems can be enabled:
@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
				@@ -189,14 +189,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/stm32f4discovery/README.txt
+++ b/nuttx/configs/stm32f4discovery/README.txt
@ -445,13 +445,13 @@ present in the NuttX configuration file:
				@@ -445,13 +445,13 @@ present in the NuttX configuration file:

  CONFIG_STM32_FSMC=y        : Enables the FSMC
  CONFIG_STM32_FSMC_SRAM=y   : Indicates that SRAM is available via the
-    FSMC (as opposed to an LCD or FLASH).
+                               FSMC (as opposed to an LCD or FLASH).
  CONFIG_HEAP2_BASE          : The base address of the SRAM in the FSMC
-    address space
-  CONFIG_HEAP2_END           : The end (+1) of the SRAM in the FSMC
-    address space
+                               address space
+  CONFIG_HEAP2_SIZE          : The size of the SRAM in the FSMC
+                               address space
  CONFIG_MM_REGIONS          : Must be set to a large enough value to
-    include the FSMC SRAM 
+                               include the FSMC SRAM 

 SRAM Configurations
 -------------------
@ -704,9 +704,9 @@ STM32F4Discovery-specific Configuration Options
				@@ -704,9 +704,9 @@ STM32F4Discovery-specific Configuration Options
    CONFIG_STM32_FSMC_SRAM - Indicates that SRAM is available via the
      FSMC (as opposed to an LCD or FLASH).

-    CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space
+    CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex)

-    CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space
+    CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal)

    CONFIG_ARCH_IRQPRIO - The STM32F4Discovery supports interrupt prioritization

--- a/nuttx/configs/stm32f4discovery/ostest/defconfig
+++ b/nuttx/configs/stm32f4discovery/ostest/defconfig
@ -178,14 +178,6 @@ CONFIG_USART3_2STOP=0
				@@ -178,14 +178,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F40xxx specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # STM32F40xxx specific CAN device driver settings
 #
--- a/nuttx/configs/twr-k60n512/nsh/defconfig
+++ b/nuttx/configs/twr-k60n512/nsh/defconfig
@ -164,14 +164,6 @@ CONFIG_UART3_PARITY=0
				@@ -164,14 +164,6 @@ CONFIG_UART3_PARITY=0
 CONFIG_UART4_PARITY=0
 CONFIG_UART5_PARITY=0

-#
-# K40X256VLQ100 specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/twr-k60n512/ostest/defconfig
+++ b/nuttx/configs/twr-k60n512/ostest/defconfig
@ -164,14 +164,6 @@ CONFIG_UART3_PARITY=0
				@@ -164,14 +164,6 @@ CONFIG_UART3_PARITY=0
 CONFIG_UART4_PARITY=0
 CONFIG_UART5_PARITY=0

-#
-# K40X256VLQ100 specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=n
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # General build options
 #
--- a/nuttx/configs/vsn/nsh/defconfig
+++ b/nuttx/configs/vsn/nsh/defconfig
@ -3,7 +3,7 @@
				@@ -3,7 +3,7 @@
 #
 #   Copyright (C) 2009-2010, 2012 Gregory Nutt. All rights reserved.
 #   Copyright (c) 2011 Uros Platise. All rights reserved.
-#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#   Author: Gregory Nutt <gnutt@nuttx.org>
 #           Uros Platise <uros.platise@isotel.eu>
 #
 # Redistribution and use in source and binary forms, with or without
@ -181,14 +181,6 @@ CONFIG_USART3_2STOP=0
				@@ -181,14 +181,6 @@ CONFIG_USART3_2STOP=0
 CONFIG_UART4_2STOP=0
 CONFIG_UART5_2STOP=0

-#
-# STM32F103Z specific SSI device driver settings
-#
-CONFIG_SSI0_DISABLE=y
-CONFIG_SSI1_DISABLE=y
-CONFIG_SSI_POLLWAIT=y
-#CONFIG_SSI_TXLIMIT=4
-
 #
 # OS support for I2C
 #
--- a/nuttx/mm/Kconfig
+++ b/nuttx/mm/Kconfig
@ -3,15 +3,6 @@
				@@ -3,15 +3,6 @@
 # see misc/tools/kconfig-language.txt.
 #

-config MM_REGIONS
-	int "Number of memory regions"
-	default 1
-	---help---
-		If the architecture includes multiple, non-contiguous regions of
-		memory to allocate from, this specifies the number of memory regions
-		that the memory manager must handle and enables the API
-		mm_addregion(start, end);
-
 config MM_SMALL
 	bool "Small memory model"
 	default n
@ -24,3 +15,30 @@ config MM_SMALL
				@@ -24,3 +15,30 @@ config MM_SMALL
 		have internal SRAM of size less than or equal to 64Kb.  In this case,
 		CONFIG_MM_SMALL can be defined so that those MCUs will also benefit
 		from the smaller, 16-bit-based allocation overhead.
+
+config MM_REGIONS
+	int "Number of memory regions"
+	default 1
+	---help---
+		If the architecture includes multiple, non-contiguous regions of
+		memory to allocate from, this specifies the number of memory regions
+		that the memory manager must handle and enables the API
+		mm_addregion(start, end);
+
+config ARCH_HAVE_HEAP2
+	bool
+
+config HEAP2_BASE
+	hex "Start address of second heap region"
+	default 0x00000000
+	depends on ARCH_HAVE_HEAP2
+	---help---
+		The base address of the second heap region.
+
+config HEAP2_SIZE
+	int "Size of the second heap region"
+	default 0
+	depends on ARCH_HAVE_HEAP2
+	---help---
+		The size of the second heap region.
+