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@ -142,6 +142,7 @@ static const int ERROR = -1;
@@ -142,6 +142,7 @@ static const int ERROR = -1;
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#define ADDR_INT1_TSH_ZH 0x36 |
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#define ADDR_INT1_TSH_ZL 0x37 |
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#define ADDR_INT1_DURATION 0x38 |
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#define ADDR_LOW_ODR 0x39 |
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/* Internal configuration values */ |
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@ -244,7 +245,7 @@ private:
@@ -244,7 +245,7 @@ private:
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// this is used to support runtime checking of key
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// configuration registers to detect SPI bus errors and sensor
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// reset
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#define L3GD20_NUM_CHECKED_REGISTERS 7 |
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#define L3GD20_NUM_CHECKED_REGISTERS 8 |
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static const uint8_t _checked_registers[L3GD20_NUM_CHECKED_REGISTERS]; |
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uint8_t _checked_values[L3GD20_NUM_CHECKED_REGISTERS]; |
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uint8_t _checked_next; |
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@ -375,7 +376,8 @@ const uint8_t L3GD20::_checked_registers[L3GD20_NUM_CHECKED_REGISTERS] = { ADDR_
@@ -375,7 +376,8 @@ const uint8_t L3GD20::_checked_registers[L3GD20_NUM_CHECKED_REGISTERS] = { ADDR_
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ADDR_CTRL_REG3, |
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ADDR_CTRL_REG4, |
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ADDR_CTRL_REG5, |
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ADDR_FIFO_CTRL_REG }; |
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ADDR_FIFO_CTRL_REG, |
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ADDR_LOW_ODR }; |
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L3GD20::L3GD20(int bus, const char* path, spi_dev_e device, enum Rotation rotation) : |
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SPI("L3GD20", path, bus, device, SPIDEV_MODE3, 11*1000*1000 /* will be rounded to 10.4 MHz, within margins for L3GD20 */), |
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@ -844,6 +846,11 @@ L3GD20::disable_i2c(void)
@@ -844,6 +846,11 @@ L3GD20::disable_i2c(void)
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uint8_t a = read_reg(0x05); |
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write_reg(0x05, (0x20 | a)); |
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if (read_reg(0x05) == (a | 0x20)) { |
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// this sets the I2C_DIS bit on the
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// L3GD20H. The l3gd20 datasheet doesn't
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// mention this register, but it does seem to
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// accept it.
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write_checked_reg(ADDR_LOW_ODR, 0x08); |
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return; |
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} |
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} |
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