omnibusf4sd: add dshot timer config

boards/omnibus/f4sd/default.cmake

@@ -19,6 +19,7 @@ px4_add_board(
 		#camera_trigger
 		#differential_pressure # all available differential pressure drivers
 		#distance_sensor # all available distance sensor drivers
+		dshot
 		gps
 		#heater
 		#imu # all available imu drivers

boards/omnibus/f4sd/nuttx-config/include/board.h

@@ -256,7 +256,7 @@
 #define GPIO_USART1_TX GPIO_USART1_TX_1
 
 /* USART1 require a RX DMA configuration */
-#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
+#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1
 
 /* USART3:
  *

boards/omnibus/f4sd/nuttx-config/nsh/defconfig

@@ -180,7 +180,6 @@ CONFIG_TASK_NAME_SIZE=24
 CONFIG_TIME_EXTENDED=y
 CONFIG_UART4_BAUD=57600
 CONFIG_UART4_RXBUFSIZE=300
-CONFIG_UART4_RXDMA=y
 CONFIG_UART4_TXBUFSIZE=300
 CONFIG_USART1_RXBUFSIZE=300
 CONFIG_USART1_RXDMA=y

boards/omnibus/f4sd/src/board_config.h

@@ -267,6 +267,8 @@
 #define BOARD_ENABLE_CONSOLE_BUFFER
 #define BOARD_CONSOLE_BUFFER_SIZE (1024*3)
 
+#define BOARD_DSHOT_MOTOR_ASSIGNMENT {2, 3, 1, 0};
+
 __BEGIN_DECLS
 
 /****************************************************************************************************

boards/omnibus/f4sd/src/timer_config.c

@@ -59,7 +59,14 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
 		.first_channel_index = 0,
 		.last_channel_index = 1,
 		.handler = io_timer_handler1,
-		.vectorno =  STM32_IRQ_TIM2
+		.vectorno =  STM32_IRQ_TIM2,
+		.dshot = {
+			.dma_base = DSHOT_DMA1_BASE,
+			.channel = DShot_Channel3,
+			.stream = DShot_Stream1,
+			.start_ccr_register = TIM_DMABASE_CCR3,
+			.channels_number = 2u /* CCR3 and CCR4 */
+		}
 	},
 	{
 		.base = STM32_TIM3_BASE,
@@ -69,9 +76,17 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
 		.first_channel_index = 2,
 		.last_channel_index = 3,
 		.handler = io_timer_handler2,
-		.vectorno =  STM32_IRQ_TIM3
+		.vectorno =  STM32_IRQ_TIM3,
+		.dshot = {
+			.dma_base = DSHOT_DMA1_BASE,
+			.channel = DShot_Channel5,
+			.stream = DShot_Stream2,
+			.start_ccr_register = TIM_DMABASE_CCR3,
+			.channels_number = 2u /* CCR3 and CCR4 */
+		}
 	}
 };
+
 /*
  * OUTPUTS:
  *  M3 : PA3 : TIM2_CH3