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@ -31,14 +31,6 @@
@@ -31,14 +31,6 @@
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* |
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****************************************************************************/ |
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/*
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* @file timer_config.c |
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* |
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* Configuration data for the imxrt pwm_servo, input capture and pwm input driver. |
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* |
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* Note that these arrays must always be fully-sized. |
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*/ |
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// TODO:Stubbed out for now
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#include <stdint.h> |
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@ -52,7 +44,7 @@
@@ -52,7 +44,7 @@
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#include "imxrt_periphclks.h" |
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#include <drivers/drv_pwm_output.h> |
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#include <px4_arch/io_timer.h> |
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#include <px4_arch/io_timer_hw_description.h> |
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#include "board_config.h" |
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@ -83,127 +75,34 @@
@@ -83,127 +75,34 @@
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#define rDMA REG(IMXRT_TMR_DMA_OFFSET) |
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#define rENBL REG(IMXRT_TMR_ENBL_OFFSET) |
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__EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { |
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{ |
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.base = IMXRT_FLEXPWM2_BASE, |
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}, |
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{ |
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.base = IMXRT_FLEXPWM3_BASE, |
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}, |
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{ |
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.base = IMXRT_FLEXPWM4_BASE, |
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}, |
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constexpr io_timers_t io_timers[MAX_IO_TIMERS] = { |
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initIOPWM(PWM::FlexPWM2), |
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initIOPWM(PWM::FlexPWM3), |
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initIOPWM(PWM::FlexPWM4), |
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}; |
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__EXPORT const io_timers_channel_mapping_t io_timers_channel_mapping = { |
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.element = { |
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{ |
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.first_channel_index = 0, |
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.channel_count = 4, |
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}, |
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{ |
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.first_channel_index = 4, |
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.channel_count = 2, |
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}, |
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{ |
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.first_channel_index = 6, |
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.channel_count = 2, |
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} |
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} |
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constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { |
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initIOTimerChannel(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule0}, IOMUX::Pad::GPIO_B0_06), |
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initIOTimerChannel(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_08), |
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initIOTimerChannel(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule2}, IOMUX::Pad::GPIO_EMC_10), |
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initIOTimerChannel(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule3}, IOMUX::Pad::GPIO_AD_B0_09), |
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initIOTimerChannel(io_timers, {PWM::PWM3_PWM_A, PWM::Submodule2}, IOMUX::Pad::GPIO_EMC_33), |
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initIOTimerChannel(io_timers, {PWM::PWM3_PWM_B, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_30), |
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initIOTimerChannel(io_timers, {PWM::PWM4_PWM_A, PWM::Submodule2}, IOMUX::Pad::GPIO_EMC_04), |
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initIOTimerChannel(io_timers, {PWM::PWM4_PWM_B, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_01), |
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}; |
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__EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { |
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{ |
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/* FMU_CH1 : GPIO_B0_06 GPIO2 Pin 6 FLEXPWM2_PWMA0 */ |
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.gpio_out = PIN_FLEXPWM2_PWMA00, |
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.gpio_portpin = GPIO_PORT2 | GPIO_PIN6, |
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.timer_index = 0, |
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.val_offset = PWMA_VAL, |
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.sub_module = SM0, |
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.sub_module_bits = MCTRL_LDOK(1 << SM0), |
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}, |
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{ |
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/* FMU_CH2 : GPIO_EMC_08 GPIO4 Pin 8 FLEXPWM2_PWMA1 */ |
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.gpio_out = PIN_FLEXPWM2_PWMA01, |
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.gpio_portpin = GPIO_PORT4 | GPIO_PIN8, |
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.timer_index = 0, |
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.val_offset = PWMA_VAL, |
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.sub_module = SM1, |
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.sub_module_bits = MCTRL_LDOK(1 << SM1), |
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}, |
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{ |
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/* FMU_CH3 : GPIO_EMC_10 GPIO4 Pin 10 FLEXPWM2_PWMA2 */ |
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.gpio_out = PIN_FLEXPWM2_PWMA02, |
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.gpio_portpin = GPIO_PORT4 | GPIO_PIN10, |
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.timer_index = 0, |
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.val_offset = PWMA_VAL, |
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.sub_module = SM2, |
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.sub_module_bits = MCTRL_LDOK(1 << SM2), |
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}, |
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{ |
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/* FMU_CH4 : GPIO_AD_B0_09 GPIO1 Pin 9 FLEXPWM2_PWMA3 */ |
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.gpio_out = PIN_FLEXPWM2_PWMA03, |
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.gpio_portpin = GPIO_PORT1 | GPIO_PIN9, |
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.timer_index = 0, |
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.val_offset = PWMA_VAL, |
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.sub_module = SM3, |
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.sub_module_bits = MCTRL_LDOK(1 << SM3), |
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}, |
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{ |
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/* FMU_CH5 : GPIO_EMC_33 GPIO3 Pin 19 FLEXPWM3_PWMA2 */ |
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.gpio_out = PIN_FLEXPWM3_PWMA02, |
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.gpio_portpin = GPIO_PORT3 | GPIO_PIN19, |
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.timer_index = 1, |
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.val_offset = PWMA_VAL, |
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.sub_module = SM2, |
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.sub_module_bits = MCTRL_LDOK(1 << SM2), |
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}, |
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{ |
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/* FMU_CH6 : GPIO_EMC_30 GPIO4 Pin 30 FLEXPWM3_PWMB0 */ |
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.gpio_out = PIN_FLEXPWM3_PWMB00, |
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.gpio_portpin = GPIO_PORT4 | GPIO_PIN30, |
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.timer_index = 1, |
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.val_offset = PWMB_VAL, |
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.sub_module = SM0, |
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.sub_module_bits = MCTRL_LDOK(1 << SM0), |
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}, |
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{ |
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/* FMU_CH7 : GPIO_EMC_04 GPIO4 Pin 4 FLEXPWM4_PWMA2 */ |
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.gpio_out = PIN_FLEXPWM4_PWMA02, |
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.gpio_portpin = GPIO_PORT4 | GPIO_PIN4, |
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.timer_index = 2, |
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.val_offset = PWMA_VAL, |
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.sub_module = SM2, |
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.sub_module_bits = MCTRL_LDOK(1 << SM2), |
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}, |
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{ |
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/* FMU_CH8 : GPIO_EMC_01 GPIO4 Pin 1 FLEXPWM4_PWMB0 */ |
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.gpio_out = PIN_FLEXPWM4_PWMB00, |
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.gpio_portpin = GPIO_PORT4 | GPIO_PIN1, |
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.timer_index = 2, |
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.val_offset = PWMB_VAL, |
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.sub_module = SM0, |
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.sub_module_bits = MCTRL_LDOK(1 << SM0), |
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}, |
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}; |
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constexpr io_timers_channel_mapping_t io_timers_channel_mapping = |
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initIOTimerChannelMapping(io_timers, timer_io_channels); |
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__EXPORT const struct io_timers_t led_pwm_timers[MAX_LED_TIMERS] = { |
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constexpr io_timers_t led_pwm_timers[MAX_LED_TIMERS] = { |
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}; |
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__EXPORT const struct timer_io_channels_t led_pwm_channels[MAX_TIMER_LED_CHANNELS] = { |
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constexpr timer_io_channels_t led_pwm_channels[MAX_TIMER_LED_CHANNELS] = { |
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}; |
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__EXPORT void fmurt1062_timer_initialize(void) |
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void fmurt1062_timer_initialize(void) |
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{ |
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/* We must configure Qtimer 3 as the IPG divide by to yield 16 Mhz
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* and deliver that clock to the eFlexPWM234 via XBAR |