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@ -83,7 +83,12 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
@@ -83,7 +83,12 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
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.last_channel_index = 3, |
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.handler = io_timer_handler0, |
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.vectorno = STM32_IRQ_TIM1CC, |
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.dshot = { |
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.dma_base = STM32_DMA2_BASE, |
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.dmamap = DMAMAP_TIM1_UP, |
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.start_ccr_register = TIM_DMABASE_CCR1, |
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.channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */ |
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} |
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}, |
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{ |
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.base = STM32_TIM4_BASE, |
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@ -94,6 +99,12 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
@@ -94,6 +99,12 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
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.last_channel_index = 5, |
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.handler = io_timer_handler1, |
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.vectorno = STM32_IRQ_TIM4, |
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.dshot = { |
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.dma_base = STM32_DMA1_BASE, |
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.dmamap = DMAMAP_TIM4_UP, |
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.start_ccr_register = TIM_DMABASE_CCR2, |
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.channels_number = 2u /* CCR2 and CCR3 */ |
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} |
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}, |
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{ |
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.base = STM32_TIM12_BASE, |
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