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@ -124,7 +124,7 @@
@@ -124,7 +124,7 @@
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/* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */ |
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# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM3_QE) || \ |
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# defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM38_TIM3_QE) |
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# defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM32_TIM8_QE) |
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# define HAVE_16BIT_TIMERS 1 |
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# endif |
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@ -296,7 +296,9 @@ static const struct stm32_qeconfig_s g_tim1config =
@@ -296,7 +296,9 @@ static const struct stm32_qeconfig_s g_tim1config =
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.psc = (STM32_APB2_TIM1_CLKIN / CONFIG_STM32_TIM1_QECLKOUT) - 1, |
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.ti1cfg = GPIO_TIM1_CH1IN, |
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.ti2cfg = GPIO_TIM1_CH2IN, |
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#if TIM1_BITWIDTH == 16 |
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.handler = stm32_tim1interrupt, |
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#endif |
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}; |
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static struct stm32_lowerhalf_s g_tim1lower = |
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@ -320,7 +322,9 @@ static const struct stm32_qeconfig_s g_tim2config =
@@ -320,7 +322,9 @@ static const struct stm32_qeconfig_s g_tim2config =
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.psc = (STM32_APB1_TIM2_CLKIN / CONFIG_STM32_TIM2_QECLKOUT) - 1, |
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.ti1cfg = GPIO_TIM2_CH1IN, |
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.ti2cfg = GPIO_TIM2_CH2IN, |
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#if TIM2_BITWIDTH == 16 |
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.handler = stm32_tim2interrupt, |
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#endif |
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}; |
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static struct stm32_lowerhalf_s g_tim2lower = |
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@ -344,7 +348,9 @@ static const struct stm32_qeconfig_s g_tim3config =
@@ -344,7 +348,9 @@ static const struct stm32_qeconfig_s g_tim3config =
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.psc = (STM32_APB1_TIM3_CLKIN / CONFIG_STM32_TIM3_QECLKOUT) - 1, |
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.ti1cfg = GPIO_TIM3_CH1IN, |
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.ti2cfg = GPIO_TIM3_CH2IN, |
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#if TIM3_BITWIDTH == 16 |
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.handler = stm32_tim3interrupt, |
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#endif |
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}; |
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static struct stm32_lowerhalf_s g_tim3lower = |
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@ -368,7 +374,9 @@ static const struct stm32_qeconfig_s g_tim4config =
@@ -368,7 +374,9 @@ static const struct stm32_qeconfig_s g_tim4config =
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.psc = (STM32_APB1_TIM4_CLKIN / CONFIG_STM32_TIM4_QECLKOUT) - 1, |
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.ti1cfg = GPIO_TIM4_CH1IN, |
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.ti2cfg = GPIO_TIM4_CH2IN, |
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#if TIM4_BITWIDTH == 16 |
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.handler = stm32_tim4interrupt, |
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#endif |
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}; |
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static struct stm32_lowerhalf_s g_tim4lower = |
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@ -392,7 +400,9 @@ static const struct stm32_qeconfig_s g_tim5config =
@@ -392,7 +400,9 @@ static const struct stm32_qeconfig_s g_tim5config =
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.psc = (STM32_APB1_TIM5_CLKIN / CONFIG_STM32_TIM5_QECLKOUT) - 1, |
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.ti1cfg = GPIO_TIM5_CH1IN, |
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.ti2cfg = GPIO_TIM5_CH2IN, |
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#if TIM5_BITWIDTH == 16 |
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.handler = stm32_tim5interrupt, |
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#endif |
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}; |
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static struct stm32_lowerhalf_s g_tim5lower = |
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@ -416,7 +426,9 @@ static const struct stm32_qeconfig_s g_tim8config =
@@ -416,7 +426,9 @@ static const struct stm32_qeconfig_s g_tim8config =
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.psc = (STM32_APB2_TIM8_CLKIN / CONFIG_STM32_TIM8_QECLKOUT) - 1, |
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.ti1cfg = GPIO_TIM8_CH1IN, |
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.ti2cfg = GPIO_TIM8_CH2IN, |
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#if TIM8_BITWIDTH == 16 |
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.handler = stm32_tim8interrupt, |
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#endif |
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}; |
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static struct stm32_lowerhalf_s g_tim8lower = |
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@ -643,11 +655,11 @@ static int stm32_interrupt(FAR struct stm32_lowerhalf_s *priv)
@@ -643,11 +655,11 @@ static int stm32_interrupt(FAR struct stm32_lowerhalf_s *priv)
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regval = stm32_getreg16(priv, STM32_GTIM_CR1_OFFSET); |
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if ((regval & ATIM_CR1_DIR) != 0) |
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{ |
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priv->position -= (int32_t)0x0000fff0; |
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priv->position -= (int32_t)0x0000ffff; |
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} |
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else |
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{ |
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priv->position += (int32_t)0x0000fff0; |
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priv->position += (int32_t)0x0000ffff; |
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} |
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return OK; |
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@ -871,7 +883,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
@@ -871,7 +883,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
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#ifdef HAVE_16BIT_TIMERS |
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#ifdef HAVE_MIXEDWIDTH_TIMERS |
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if (priv->config->width != 32) |
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#else |
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#endif |
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{ |
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/* Attach the interrupt handler */ |
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