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add step hooks to make stepping work correctly for non isrs

Conflicts:

	Debug/openocd.gdbinit
	Debug/px4fmu-v1-board.cfg
sbg
Kevin Hester 12 years ago committed by Lorenz Meier
parent
commit
fa8f8f2a02
  1. 16
      Debug/openocd.gdbinit
  2. 32
      Debug/px4fmu-v1-board.cfg

16
Debug/openocd.gdbinit

@ -1,7 +1,21 @@ @@ -1,7 +1,21 @@
target remote :3333
mon reset halt
# Don't let GDB get confused while stepping
define hook-step
mon cortex_m maskisr on
end
define hookpost-step
mon cortex_m maskisr off
end
mon init
mon stm32_init
# mon reset halt
mon poll
mon cortex_m maskisr auto
set mem inaccessible-by-default off
set print pretty
source Debug/PX4
echo PX4 resumed, press ctrl-c to interrupt\n
continue

32
Debug/px4fmu-v1-board.cfg

@ -4,3 +4,35 @@ @@ -4,3 +4,35 @@
set WORKAREASIZE 0x8000
source [find target/stm32f4x.cfg]
# needed for px4
reset_config trst_only
proc stm32_reset {} {
reset halt
# FIXME - needed to init periphs on reset
# 0x40023800 RCC base
# 0x24 RCC_APB2 0x75933
# RCC_APB2 0
}
# perform init that is required on each connection to the target
proc stm32_init {} {
# force jtag to not shutdown during sleep
#uint32_t cr = getreg32(STM32_DBGMCU_CR);
#cr |= DBGMCU_CR_STANDBY | DBGMCU_CR_STOP | DBGMCU_CR_SLEEP;
#putreg32(cr, STM32_DBGMCU_CR);
mww 0xe0042004 00000007
}
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
# Let GDB directly program elf binaries
gdb_memory_map enable
# doesn't work yet
gdb_flash_program disable

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