Rename nuttx patch
Add nuttx patch for unused variable error
Pending nuttx patch
Backport nuttx fix for unused variables in nsh_proccmds.c
Fix Patch format
Modify pending patch to match new nuttx PR
Move accepted nuttx changes from pending patch to backport patch
This backports upstrem NuttX
ea7b673 - Allow dma in 1 bit mode in STM32F4xxx
17cbec1 - fix warning from ea7b673
4795d58 - Only the decoded.oid = (cid[0] >> 8) change.
Thanks to Jussi Kivilinna
9169ff6a15
stm32_serial: fix freezing serial port. Serial interrupt enable/disable functions
do not disable interrupts and can freeze device when serial interrupt is received
while execution is at those functions.
Trivially triggered with two or more threads write to regular syslog stream and to
emergency stream. In this case, freeze happens because of mismatch of priv->ie
(TXEIE == 0) and actually enabled interrupts in USART registers (TXEIE == 1),
which leads to unhandled TXE interrupt and causes interrupt storm for USART.
* NSH Added support for set [{+|-}{e|x|xe|ex}] [<name> <value>]
Set the 'exit on error control' and/or 'print a trace' of
commands when parsing scripts in NSH.
The settinngs are in effect from the point of exection,
until they are changed again, or in the case of the init
script, the settings are returned to the default settings
when it exits.
Included child scripts will run with the parents settings
and changes made in the child script will effect the parent
on return.
Use 'set -e' to enable and 'set +e' to disable (ignore) the exit
condition on commands. The default is -e. Errors cause script to
exit.
Use 'set -x' to enable and 'set +x' to disable (silence) printing
a trace of the script commands as they are ececuted. The default
is +x. No printing of a trace of script commands as they are
executed.
Print expanded variables if -x
* Added comments only on how to use the set +e and and set -x
* Spelling NSH_PFALG_* -> NSH_PFLAG_*
1) Revert the inherited dma bug from the stm32
see df9ae3c13f
for details.
2) Most all CR1-CR3 settings can not be configured while UE
is true. Threfore we make all operation atomic and disable
UE and restore it's originalstate on exit.
N.B. This backport omits all upstream breaking changes.
* stm32 Updated flash patch to upstream (fixes missing commit)
* Removed zubaxgnss-v1_bootloader check build will not fit
Removing zubaxgnss-v1_bootloader from the check build. It is overflowing flash by 6 Bytes.
PX4 contrib from <jose.souza@intel.com>
1) stm32: Fix erase sector number for microcontrolers with
more than 11 sectors
Erase a sector from the second bank cause the bit 4 of SNB being set
but never unsed, so trying to erase a sector from the first bank
was acually eraseing a sector from the second bank.
2) stm32: Make up_progmem thread safe
Writing to a flash sector while starting the erase of other sector
have a undefined behavior so lets add a [staticaly initalized]
semaphore and syncronize access to Flash registers.
3) Add workaround for flash data cache corruption on
read-while-write
This is a know hardware issue on some STM32 see the errata
of your model and if you make use of both memory banks you
should enable it.
4) Greg's cleanup
5) PX4 clean up
stm32_flash:Need conditional on non F4 targets
* Order patch application
Per discussion with @demarchi this PR adds ordering to the
patch application.
This alos add some encoding
00000 series - is for px4 non up streamable changes
60000 (bp) series - is for back ports
90000 series - is for wip that shold make it upstream
* Restore 00010-workarround-for-flash-data-cache-corruption
Extract this from the 90000-wip-inflight-to-upstream.patch
and orders it.
* Moved upstreamed 0dbf44e flash fix to bp patch
* Moved upstreamed 5481087 cdcacm fix to bp patch
* Moved upstreamed ec85425 STM32F7 copy paste errors to bp patch
* Moved upstreamed 20e7237 HSI should not be turned off to bp patch
* Moved upstreamed ca895b9 Adding missing CONFIG_ prefix to bp patch
* Moved upstreamed 169b398 STM32: Fixes the bkp reference counter issue to bp patch
* Moved upstreamed 550d259 STM32F7: Fixes the bkp reference counter issue to bp patch
* Moved upstreamed 02825f3 STM32F3X: Add missing STM32_BKP_BASE to bp patch
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
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* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
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* Renamed for ordering and classification
* Renamed for ordering and classification
* Order Patches by Name
* Backport:stm32f7: stm32_allocateheap: allow use DTCM memory for heap
Back port of upstrem contrib by Jussi Kivilinna <jussi.kivilinna@haltian.com>
stm32f7: stm32_allocateheap: allow use DTCM memory for heap
STM32F7 has up to 128KiB of DTCM memory that is currently left unused.
This patch adds DTCM to main heap if CONFIG_STM32F7_DTCMEXCLUDE is not enabled.
* px4fmu-v5_default:Enable inclusion of the DTCM in the heap
CONFIG_MM_REGIONS=3 adds the DTCM region to the heap.
Backport of upstream:
7601a27cee348f70bebcac95e8e8372fe0651bbf David Sidrane Thu Mar 16 14:16:18 2017 -1000 sem_holder:The logic for the list version is unchanged
3cc2a4f7c9bb495da6c59f373f8d0e7672e4ee13 David Sidrane Wed Mar 15 14:02:55 2017 -1000 sem_holder: Fixes improper restoration of base_priority
caf8bac7fb9452f25a3297147e7b414d46e74c6f David Sidrane Mon Mar 13 22:54:13 2017 +0000 missing semi
d66fd9f965f27eb0446d6aed24b8758674f98b53 David Sidrane Mon Mar 13 12:34:39 2017 -1000 semaphore:sem_boostholderprio prevent overrun of pend_reprios
3c00651cfef3a0d90bb9e6522463965ad8989e6c David Sidrane Mon Mar 13 11:56:31 2017 -1000 semaphore:sem_holder sem_findholder missing inintalization of pholder
4d760c5ea44c5f8d30a1a595800e9fbf4874e705 David Sidrane Mon Mar 13 10:46:26 2017 -1000 semaphore:sem_holder add DEBUGASSERTs
modified 399f3067441941072664bdbfa1bfec8ff35aa449 Gregory Nutt Sat Mar 11 08:57:34 2017 -0600 A few cosmetic changes (removed file that had nothing to do with semaphore commit by OA)
60d8606b19a7e7c1285a0ef5e8addaaedf26b95f David Sidrane Fri Mar 10 06:38:17 2017 -1000 Priority Inversion fixes:Initalization
6cc8f9100b3c8026e73ca738aaa5120bd78dae74 David Sidrane Fri Mar 10 06:37:46 2017 -1000 Priority Inversion fixes:typo
360539afacc83132acdb83da8f20c468dbe4c63d Gregory Nutt Fri Mar 10 09:30:15 2017 -0600 Priority inheritance: When CONFIG_SEM_PREALLOCHOLDERS==0, there is only a single, hard-allocated holder structure.
This is problem because in sem_wait() the holder is released, but needs to remain in the holder container
a93e46d00c1bc3447fb290b866ed21d8f9c8e146 Gregory Nutt Fri Mar 10 08:54:50 2017 -0600 Cosmetic (missleading OA commit message) Using !pholder is now pholder == NULL
sem_holder: Fixes improper restoration of base_priority
in the case of CONFIG_SEM_PREALLOCHOLDERS=0
Original code did not take into accout that 2 holder are needed
and failed silently when a slot could not be allocated
The call to sem_restorebaseprio_task context switches in the
sem_foreachholder(sem, sem_restoreholderprioB, stcb); call
prior to releasing the holder. So the running task is left
as a holder as is the started task. Leaving both slots filled
Thus failing to perforem the boost/or restoration on the
correct tcb.
This PR fixes this by releasing the running task slot prior
to reprioritization that can lead to the context switch.
To faclitate this, the interface to sem_restorebaseprio
needed to take the tcb from the holder prior to the
holder being freed. In the failure case where sched_verifytcb
fails it added the overhead of looking up the holder.
There is also the additional thunking on the foreach to
get from holer to holder->tcb.
Backport of upstream NuttX
86400a252dcbe6e4aef3ecca000b469a0fe96b67
08e92abb0ba744927ed0b32294859b0f47726f82
4b65817e99cbdf04fefad883eca0e7c8a9add63c
Improper rounding in redundant stack coloring
routines could overwriting the TOS+1 and BOS-1
depending on the value of CONFIG_ARCH_INTERRUPTSTACK
This applies the compelet upstream set of fixes from
David Cabecinhas <david.cab+bitbucket@gmail.com>
Improper rouding in redundant stack coloring
routines was overwriting the TOS+1 and BOS-1
The legacy OABI 4 byte stack alingment was removed
Only the EABI 8 byte alinement is supported
The redundant interrupt stack coloring. up_initalize
had the correct implemantation (last verson of patch)
and the redundant version in the
arch/arm/src/stmxxx/stmxx_irq.c was calculating the size
wrong.
This is fixed by rounding up CONFIG_ARCH_INTERRUPTSTACK
by 4 bytes when allocated and alining on a 8 byte boundry
nuttx-patches/workarround_for_flash_data_cache_corruption.patch was
patching a file patched in nuttx-patches/wip_inflight_to_upstream.patch
The changes in workarround_for_flash_data_cache_corruption.patch
will be submitted upstream once refactored (upstream coding style
compliant and moved to correct location)
backport 3cd66af889b42b036d6c9d88e067fc3b8abbdb2a and pr 258
Applies to STM32F4 and STM32F7
STM32, STM32 F7, and STM32 L4: Clone Freddie Chopin's I2C change to similar STM32 I2C drivers.
Save elapsed time before handling I2C in stm32_i2c_sem_waitstop()
This patch follows the same logic as in previous fix to
stm32_i2c_sem_waitdone().
It is possible that a context switch occurs after I2C registers are read
but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
possible that the registers were read only once with "elapsed time"
equal 0. When scheduler resumes this thread it is quite possible that
now "elapsed time" will be well above timeout threshold. In that case
the function returns and reports a timeout, even though the registers
were not read "recently".
Fix this by inverting the order of operations in the loop - save elapsed
time before reading registers. This way a context switch anywhere in the
loop will not cause an erroneous "timeout" error.
5a6d95dd9f051be548a8d2378aaef75f0a1ba5e1 and ee5ae3a57dbbe835584f164c956e0374da1ed2eb
Applies to STM32F4 and STM32F7
Save elapsed time before handling I2C in stm32_i2c_sem_waitdone()
It is possible that a context switch occurs after stm32_i2c_isr() call
but before elapsed time is saved in stm32_i2c_sem_waitdone(). It is then
possible that the handling code was executed only once with "elapsed
time" equal 0. When scheduler resumes this thread it is quite possible
that now "elapsed time" will be well above timeout threshold. In that
case the function returns and reports a timeout, even though the
handling code was not executed "recently".
Fix this by inverting the order of operations in the loop - save elapsed
time before handling I2C. This way a context switch anywhere in the loop
will not cause an erroneous "timeout" error.
This is an intrim nuttx patch that fixes the missing CONFIG_
prefix on RAMTRON_WRITEWAIT. PR submitted upstream. This will
be in affect until the next uptake of upstream NuttX
STM32F4 does not require the HSI to erase or program FLASH
The HSI needs to be left on until a new clock source is chosen.
(we leave it on all the time)
NuttX had the CRTSCTS define incorrectly set for only output flow control, which broke our flow control logic. This commit patches NuttX and puts in addition a guard in place to prevent any future issue with the non-POSIX define being incorrect.
This has been debugged and identified by @ecmnet, which was the main contribution for this patch.
This hot fix essentialy revert commit 265af481209d60033f7cd4c4216048b1ce3eb435
in NuttX/nuttx. The commit STM32 serial: Make input hardware flow-control work with RX DMA.
From Jussi Kivilinna has broken the DMA on an STM32F4 in a yet TBD way.
The symptoms are lost data on RX, the DMA count decrements but
the data ia not written to memory. This looks to be introduced but the
non circular DMA settings.
1) Ensure if CONFIG_SERIAL_DMA is set that cdcacm uart_ops is initalized
with correct functions in correct slots.
This was detected only with PX4 build flags
2) C&P error from F7 would prevent CONFIG_STM32_SERIALBRK_BSDCOMPAT ifdefed
code from being included.
Julien Lecoeur
Daniel Agar
David Sidrane
José Roberto de Souza
Lorenz Meier