3f890b6ab1
px4_fmu-v5 stackcheck compress defconfig
6 years ago
f6cd70bcc5
px4_fmu-v5 nsh compress defconfig
6 years ago
7ccaf1068b
px4_fmu-v4pro nsh compress defconfig
6 years ago
8f32f3a0c8
px4_fmu-v4 stackcheck compress defconfig
6 years ago
41ff6c60ba
px4_fmu-v4 nsh compress defconfig
6 years ago
f1f84e52c7
px4_fmu-v3 stackcheck compress defconfig
6 years ago
d5b617deac
px4_fmu-v3 nsh compress defconfig
6 years ago
fa2142d06e
px4_fmu-v2 nsh compress defconfig
6 years ago
de7df621d7
px4_io-v2 nsh compress defconfig
6 years ago
3938574a4a
px4_fmuv5:Extend probes to CAP pins
...
This also fixes a typo in the GPIO defines
6 years ago
257b90958f
Correct links to example docs
6 years ago
f8c50f442f
Fix RSSI in on FMUv4 (pixracer)
6 years ago
d60d802194
Correct board-config PIN1/PIN0 typo in fmu-v5/src/board_config.h.
6 years ago
edd9f91a19
board:Set larger stack margin
6 years ago
12d442e8dd
px4_fmuv5:Stack Check build Increase to 2624
...
The cause of the stack detection fault is because of the
level of nesting in the start up script. We need to
determine the worst case configuration and set the
bar there.
This fault occurred some 42 calls deep due to script
calling script (repeat).
The HW stack check requires as a margin of 204 bytes. That is
ISR HW stacking of CPU(8) FPU(18) registers and SW stacking of
CPU(11) and FPU(16) registers. Total CPU(19) registers is
68 bytes and the total FPU(34) registers is 136 bytes. On
a system with a separate ISR stack This only needs to be 104
so there is 100 bytes of headroom. But as coded the detection
will give a false positive detection and fault. This does not
mean that the stack will be corrupted.
Adjustments to that stack can have no effect due to rounding.
A stack size of 2608 and 2616 can yield the exact same size stack.
So even when the failure is due to a 4 byte overflow, it can take
greater than a 16 bytes increase to fix it. Because the final
stack size is calculated with an 8 byte alignment after a 4 byte
decrease. So 2624 becomes 2620 at runtime and will boot
with SYS_AUTOSTART=4001.
6 years ago
0846059646
fmuv5:Repurpose TIM5_SPARE_4 as nARMED
...
nARMED is a Digital OUTPUT. GPIO will be set as input while not
armed HW will have Pull UP. While armed it will be configured
as a GPIO OUT set LOW.
6 years ago
cefffe652f
Correted list of serial ports for lpe target for fmu v2 board
6 years ago
20e44aa320
Analog Device ADIS16497 IMU initial support
6 years ago
6d2849f4ef
fmu-v4 rc.board_extras: use 'if ! ' instead if 'if then else'
6 years ago
f1d17c9003
camera_capture add to all boards
6 years ago
b40f8d52a8
STM32F7 disable d-cache as a precaution ( #11374 )
...
- see 1259864 Data corruption in a sequence of Write-Through stores and loads
- if we can be certain this sequence won't occur in PX4 then the d-cache will be re-enabled
6 years ago
b12b4e1222
fixes after rebase
6 years ago
adad624572
px4_fmu-v5 remove PX4_FMUV5_RC00
6 years ago
06f5a782f4
px4_fmu-v5 board spi cleanup
6 years ago
1a4d31140e
create example vehicle type build configs for fmu-v2 and fmu-v5 ( #10963 )
...
- update navigator precision landing to build without multicopter
6 years ago
8dc0509989
mpu9250: split icm20948 support out into new separate driver
6 years ago
298049b0fb
px4_fmu-v4_stackcheck sync with default and increase pmw3901 main stack
6 years ago
6f9a9b3d2c
px4_fmu-v4: add runtime external SPI4 detection to support pmw3901 ( #11301 )
...
* The build is built with SPI4. At run time the signal GPIO_8266_GPIO2 it tested. If it is low the SPI4 is configured. If it is high SPI4 is not configured.
* board_common: Add Notion of Board has bus manifest
6 years ago
dc5f18bdcd
ToneAlarm class refactoring to implement an interface for hardware specific methods and a single ToneAlarm class.
6 years ago
23617fb880
px4_fmu-v2_default disable constained flash options
6 years ago
739a02022b
position_estimator_inav: move to examples (start deprecation)
6 years ago
0f5f4814bb
px4_fmu-v5: Inital commit NuttX 7.27+
6 years ago
7e863456c4
px4_fmu-v4pro: Inital commit NuttX 7.27+
6 years ago
938f1453fe
px4_fmu-v4: Inital commit NuttX 7.27+
6 years ago
9430854404
px4_fmu-v3: Inital commit NuttX 7.27+
6 years ago
b31f29b983
px4_fmu-v2: Inital commit NuttX 7.27+
6 years ago
09d279b1e0
px4_esc-v1: Inital commit NuttX 7.27+
6 years ago
f943aa5d26
px4_cannode-v1:Inital commit NuttX 7.27+
6 years ago
2d7effa342
px4_io-v2: Inital commit NuttX 7.27+
6 years ago
8f308efa88
upstram NuttX CONFIG_EXAMPLES_NSH_CXXINITIALIZE->CONFIG_SYSTEM_NSH_CXXINITIALIZE
6 years ago
5c23099eed
board_button_irq: API change in upstream
6 years ago
f2208171d5
Add callout for CONFIG_BOARDCTL_FINALINIT
6 years ago
2ffb49b734
delete px4_includes.h header and update boards/ to use syslog
6 years ago
67e5986c9b
delete obsolete examples/subscriber
6 years ago
693ee4808a
delete obsolete examples/publisher
6 years ago
320d2e9383
create PX4 platform layer initialization helper ( #11269 )
...
- starts requirements for PX4 modules (hrt, param, etc)
6 years ago
65fe3ce5d3
px4_fmu-v2_default temporarily disable sf0x
...
- can be reenabled after #11256 is merged
6 years ago
d4c87132e4
board raspi (vanilla): simply added two lines to pass the compile
6 years ago
c319ea7189
boards sync fmu-v2 sensors start with fmu-v3
6 years ago
fef65bf5c8
ROMFS split rc.board into defaults, sensors, and extras
6 years ago
Daniel Agar
David Sidrane
Hamish Willee
Vasily Evseenko
mcsauder
fpvaspassion
Mohammed Kabir
Beat Küng
DanielePettenuzzo
SalimTerryLi