* Order patch application
Per discussion with @demarchi this PR adds ordering to the
patch application.
This alos add some encoding
00000 series - is for px4 non up streamable changes
60000 (bp) series - is for back ports
90000 series - is for wip that shold make it upstream
* Restore 00010-workarround-for-flash-data-cache-corruption
Extract this from the 90000-wip-inflight-to-upstream.patch
and orders it.
* Moved upstreamed 0dbf44e flash fix to bp patch
* Moved upstreamed 5481087 cdcacm fix to bp patch
* Moved upstreamed ec85425 STM32F7 copy paste errors to bp patch
* Moved upstreamed 20e7237 HSI should not be turned off to bp patch
* Moved upstreamed ca895b9 Adding missing CONFIG_ prefix to bp patch
* Moved upstreamed 169b398 STM32: Fixes the bkp reference counter issue to bp patch
* Moved upstreamed 550d259 STM32F7: Fixes the bkp reference counter issue to bp patch
* Moved upstreamed 02825f3 STM32F3X: Add missing STM32_BKP_BASE to bp patch
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Renamed for ordering and classification
* Order Patches by Name
backport 3cd66af889b42b036d6c9d88e067fc3b8abbdb2a and pr 258
Applies to STM32F4 and STM32F7
STM32, STM32 F7, and STM32 L4: Clone Freddie Chopin's I2C change to similar STM32 I2C drivers.
Save elapsed time before handling I2C in stm32_i2c_sem_waitstop()
This patch follows the same logic as in previous fix to
stm32_i2c_sem_waitdone().
It is possible that a context switch occurs after I2C registers are read
but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
possible that the registers were read only once with "elapsed time"
equal 0. When scheduler resumes this thread it is quite possible that
now "elapsed time" will be well above timeout threshold. In that case
the function returns and reports a timeout, even though the registers
were not read "recently".
Fix this by inverting the order of operations in the loop - save elapsed
time before reading registers. This way a context switch anywhere in the
loop will not cause an erroneous "timeout" error.
5a6d95dd9f051be548a8d2378aaef75f0a1ba5e1 and ee5ae3a57dbbe835584f164c956e0374da1ed2eb
Applies to STM32F4 and STM32F7
Save elapsed time before handling I2C in stm32_i2c_sem_waitdone()
It is possible that a context switch occurs after stm32_i2c_isr() call
but before elapsed time is saved in stm32_i2c_sem_waitdone(). It is then
possible that the handling code was executed only once with "elapsed
time" equal 0. When scheduler resumes this thread it is quite possible
that now "elapsed time" will be well above timeout threshold. In that
case the function returns and reports a timeout, even though the
handling code was not executed "recently".
Fix this by inverting the order of operations in the loop - save elapsed
time before handling I2C. This way a context switch anywhere in the loop
will not cause an erroneous "timeout" error.
David Sidrane