This is a back port of upstream NuttX PX4 contrib of
ef42c25 stm32f7:SDMMC add dcache alignment check in dma{recv|send}setup
In the where CONFIG_SDIO_PREFLIGHT is not used and dcache
write-buffed mode is used (not write-through) buffer alignment
is required for DMA transfers because a) arch_invalidate_dcache
could lose buffered writes data and b) arch_flush_dcache could
corrupt adjacent memory if the buffer and the bufflen, are not on
ARMV7M_DCACHE_LINESIZE boundaries.
1e7ddfe stm32f7:SDMMC remove widebus limitation on DMA
There is no documantation for the STM32F7 that limits DMA on
1 bit vrs 4 bit mode.
dffab2f stm32f7:DMA add dcache alignment check in stm32_dmacapable
In the case dcache write-buffed mode is used (not write-through)
buffer alignment is required for DMA transfers because
a) arch_invalidate_dcache could lose buffered writes data and
b) arch_flush_dcache could corrupt adjacent memory if the
maddr and the mend+1, the next next address are not on
ARMV7M_DCACHE_LINESIZE boundaries.
38cbf1f stm32f7:DMA correct comments and document stm32_dmacapable
Updated comment to proper refernce manual for STM32F7 not STM32F4.
Added stm32_dmacapable input paramaters documentation.
Juha Niskanen committed 326ab01 2017-06-20
STM32 F7: Set I2C4 SDA and SCL pins to open drain mode
Titus von Boxberg committed f3267dd 2017-07-17
I2C4_SDA can also be on GPIO PB7
Titus von Boxberg committed 28eab90 2017-07-27
No FSMC, only FMC for STM32F7
Rename nuttx patch
Add nuttx patch for unused variable error
Pending nuttx patch
Backport nuttx fix for unused variables in nsh_proccmds.c
Fix Patch format
Modify pending patch to match new nuttx PR
Move accepted nuttx changes from pending patch to backport patch
This backports upstrem NuttX
ea7b673 - Allow dma in 1 bit mode in STM32F4xxx
17cbec1 - fix warning from ea7b673
4795d58 - Only the decoded.oid = (cid[0] >> 8) change.
Thanks to Jussi Kivilinna
9169ff6a15
stm32_serial: fix freezing serial port. Serial interrupt enable/disable functions
do not disable interrupts and can freeze device when serial interrupt is received
while execution is at those functions.
Trivially triggered with two or more threads write to regular syslog stream and to
emergency stream. In this case, freeze happens because of mismatch of priv->ie
(TXEIE == 0) and actually enabled interrupts in USART registers (TXEIE == 1),
which leads to unhandled TXE interrupt and causes interrupt storm for USART.
It needs to be determined if this class should be for any imu sensor or
if it is specific to the MPU9250.
Also, the callback doesn't publish anything just yet.
Now the mixer is a C++ library that can be fairly easily bolted into an output driver to provide mixing services.
Teach the FMU driver how to use it as an example. More testing is still required.
David Sidrane
Julien Lecoeur
Daniel Agar
Michael Schaeuble
Nicolas de Palezieux
Julian Oes
Mark Charlebois
James Goppert
Anton Babushkin
Luis Rodrigues
Lorenz Meier
px4dev