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270 lines
10 KiB
270 lines
10 KiB
/************************************************************************************ |
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* configs/nucleus2g/include/board.h |
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* include/arch/board/board.h |
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* |
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* Copyright (C) 2010 Gregory Nutt. All rights reserved. |
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr> |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* 3. Neither the name NuttX nor the names of its contributors may be |
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* used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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* |
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************************************************************************************/ |
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#ifndef __ARCH_BOARD_BOARD_H |
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#define __ARCH_BOARD_BOARD_H |
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/************************************************************************************ |
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* Included Files |
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************************************************************************************/ |
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#include <nuttx/config.h> |
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/************************************************************************************ |
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* Definitions |
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************************************************************************************/ |
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/* Clocking *************************************************************************/ |
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/* NOTE: The following definitions require lpc17_syscon.h. It is not included here |
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* because the including C file may not have that file in its include path. |
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*/ |
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#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */ |
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#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */ |
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#define BOARD_RTCCLK_FREQUENCY (32000) /* RTC oscillator frequency */ |
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#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */ |
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/* This is the clock setup we configure for: |
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* |
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* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source |
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* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1 |
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* CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6 |
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*/ |
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#define LPC17_CCLK 80000000 /* 80Mhz */ |
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/* Select the main oscillator as the frequency source. SYSCLK is then the frequency |
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* of the main oscillator. |
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*/ |
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#undef CONFIG_LPC17_MAINOSC |
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#define CONFIG_LPC17_MAINOSC 1 |
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#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN |
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/* Select the main oscillator and CCLK divider. The output of the divider is CCLK. |
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* The input to the divider (PLLCLK) will be determined by the PLL output. |
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*/ |
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#define BOARD_CCLKCFG_DIVIDER 6 |
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#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT) |
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/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK). |
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* |
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* Source clock: Main oscillator |
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* PLL0 Multiplier value (M): 20 |
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* PLL0 Pre-divider value (N): 1 |
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* |
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* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz |
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*/ |
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#undef CONFIG_LPC17_PLL0 |
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#define CONFIG_LPC17_PLL0 1 |
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#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN |
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#define BOARD_PLL0CFG_MSEL 20 |
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#define BOARD_PLL0CFG_NSEL 1 |
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#define BOARD_PLL0CFG_VALUE \ |
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(((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \ |
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((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT)) |
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/* PLL1 -- Not used. */ |
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#undef CONFIG_LPC17_PLL1 |
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#define BOARD_PLL1CFG_MSEL 36 |
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#define BOARD_PLL1CFG_NSEL 1 |
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#define BOARD_PLL1CFG_VALUE \ |
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(((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \ |
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((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT)) |
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/* USB divider. This divider is used when PLL1 is not enabled to get the |
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* USB clock from PLL0: |
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* |
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* USBCLK = PLL0CLK / 10 = 48MHz |
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*/ |
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#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10 |
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/* FLASH Configuration */ |
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#undef CONFIG_LP17_FLASH |
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#define CONFIG_LP17_FLASH 1 |
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#define BOARD_FLASHCFG_VALUE 0x0000303a |
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/* LED definitions ******************************************************************/ |
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/* The Nucleus2G has 3 LEDs... two on the Babel CAN board and a "heartbeat" LED." |
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* The LEDs on the Babel CAN board are capabl of OFF/GREEN/RED/AMBER status. |
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* In normal usage, the two LEDs on the Babel CAN board would show CAN status, but if |
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* CONFIG_ARCH_LEDS is defined, these LEDs will be controlled as follows for NuttX |
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* debug functionality (where NC means "No Change"). |
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* |
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* During the boot phases. LED1 and LED2 will show boot status. |
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*/ |
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/* LED1 LED2 HEARTBEAT */ |
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#define LED_STARTED 0 /* OFF OFF OFF */ |
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#define LED_HEAPALLOCATE 1 /* GREEN OFF OFF */ |
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#define LED_IRQSENABLED 2 /* OFF GREEN OFF */ |
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#define LED_STACKCREATED 3 /* OFF OFF OFF */ |
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/* After the system is booted, this logic will no longer use LEDs 1 and 2. They |
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* are available for use the application software using lpc17_led1() and lpc17_led2() |
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* (prototyped below) |
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*/ |
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/* LED1 LED2 HEARTBEAT */ |
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#define LED_INIRQ 4 /* NC NC ON (momentary) */ |
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#define LED_SIGNAL 5 /* NC NC ON (momentary) */ |
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#define LED_ASSERTION 6 /* NC NC ON (momentary) */ |
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#define LED_PANIC 7 /* NC NC ON (1Hz flashing) */ |
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/* Alternate pin selections *********************************************************/ |
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/* UART1 -- Not connected */ |
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#define GPIO_UART1_TXD GPIO_UART1_TXD_1 |
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#define GPIO_UART1_RXD GPIO_UART1_RXD_1 |
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#define GPIO_UART1_CTS GPIO_UART1_CTS_1 |
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#define GPIO_UART1_DCD GPIO_UART1_DCD_1 |
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#define GPIO_UART1_DSR GPIO_UART1_DSR_1 |
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#define GPIO_UART1_DTR GPIO_UART1_DTR_1 |
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#define GPIO_UART1_RI GPIO_UART1_RI_1 |
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#define GPIO_UART1_RTS GPIO_UART1_RTS_1 |
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/* UART2 -- Not connected */ |
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#define GPIO_UART2_TXD GPIO_UART2_TXD_1 |
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#define GPIO_UART2_RXD GPIO_UART2_RXD_1 |
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/* UART3 -- Not connected */ |
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#define GPIO_UART3_TXD GPIO_UART3_TXD_1 |
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#define GPIO_UART3_RXD GPIO_UART3_RXD_1 |
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/* Either SPI or SSP0 can drive the MMC/SD slot (SSP0 alternate pin settings are |
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* not connected) |
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*/ |
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#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1 |
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#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1 |
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#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1 |
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#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1 |
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/* SSP1 */ |
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#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1 |
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/************************************************************************************ |
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* Public Types |
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************************************************************************************/ |
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#ifndef __ASSEMBLY__ |
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#ifdef CONFIG_ARCH_LEDS |
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enum lpc17_ledstate_e |
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{ |
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LPC17_LEDSTATE_OFF = 0, |
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LPC17_LEDSTATE_GREEN = 1, |
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LPC17_LEDSTATE_RED = 2, |
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LPC17_LEDSTATE_AMBER = (LPC17_LEDSTATE_GREEN|LPC17_LEDSTATE_RED), |
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}; |
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#endif |
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enum output_state |
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{ |
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RELAY_OPEN = 0, |
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RELAY_CLOSED = 1, |
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RELAY_TOGGLE = 2, |
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}; |
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/************************************************************************************ |
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* Public Data |
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************************************************************************************/ |
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#undef EXTERN |
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#if defined(__cplusplus) |
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#define EXTERN extern "C" |
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extern "C" { |
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#else |
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#define EXTERN extern |
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#endif |
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/************************************************************************************ |
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* Public Function Prototypes |
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************************************************************************************/ |
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/************************************************************************************ |
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* Name: lpc17_boardinitialize |
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* |
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* Description: |
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* All LPC17xx architectures must provide the following entry point. This entry point |
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* is called early in the initialization -- after all memory has been configured |
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* and mapped but before any devices have been initialized. |
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* |
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************************************************************************************/ |
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EXTERN void lpc17_boardinitialize(void); |
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/************************************************************************************ |
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* Name: lpc17_led1 and 2 |
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* |
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* Description: |
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* Once the system has booted, these functions can be used to control LEDs 1 and 2 |
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* |
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************************************************************************************/ |
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#ifdef CONFIG_ARCH_LEDS |
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EXTERN void lpc17_led1(enum lpc17_ledstate_e state); |
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EXTERN void lpc17_led2(enum lpc17_ledstate_e state); |
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#endif |
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/************************************************************************************ |
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* Name: nucleus_bms_relay 1-4 |
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* |
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* Description: |
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* once booted these functions control the 4 isolated FET outputs from the |
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* master BMS controller |
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* |
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************************************************************************************/ |
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#ifdef CONFIG_ARCH_BOARD_NUCLEUS2G_BMS |
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EXTERN void nucleus_bms_relay1(enum output_state state); |
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EXTERN void nucleus_bms_relay2(enum output_state state); |
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EXTERN void nucleus_bms_relay3(enum output_state state); |
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EXTERN void nucleus_bms_relay4(enum output_state state); |
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#endif |
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#undef EXTERN |
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#if defined(__cplusplus) |
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} |
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#endif |
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#endif /* __ASSEMBLY__ */ |
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#endif /* __ARCH_BOARD_BOARD_H */
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