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243 lines
8.4 KiB
243 lines
8.4 KiB
/************************************************************************************ |
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* configs/vsn/include/board.h |
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* include/arch/board/board.h |
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* |
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* Copyright (C) 2009 Gregory Nutt. All rights reserved. |
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* Copyright (C) 2011 Uros Platise. All rights reserved |
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* |
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* Authors: Gregory Nutt <spudmonkey@racsa.co.cr> |
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* Uros Platise <uros.platise@isotel.eu> |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* 3. Neither the name NuttX nor the names of its contributors may be |
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* used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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* |
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************************************************************************************/ |
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#ifndef __ARCH_BOARD_BOARD_H |
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#define __ARCH_BOARD_BOARD_H |
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/************************************************************************************ |
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* Included Files |
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************************************************************************************/ |
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#include <nuttx/config.h> |
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#ifndef __ASSEMBLY__ |
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# include <stdint.h> |
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#endif |
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#include "stm32_rcc.h" |
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#include "stm32_sdio.h" |
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#include "stm32_internal.h" |
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#include "muxbus.h" |
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/************************************************************************************ |
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* Definitions |
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************************************************************************************/ |
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/* Clocking *************************************************************************/ |
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/* On-board external frequency source is 9MHz (HSE) provided by the CC1101, so it is |
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* not available on power-up. Instead we are about to run on HSI*9 = 36 MHz, see |
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* up_sysclock.c for details. |
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*/ |
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#define STM32_BOARD_XTAL 9000000UL |
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#define STM32_BOARD_HCLK 36000000UL |
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/* PLL source is either HSI or HSE |
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* When HSI: PLL multiplier is 9, out frequency 36 MHz |
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* When HSE: PLL multiplier is 8: out frequency is 9 MHz x 8 = 72MHz |
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*/ |
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#define STM32_CFGR_PLLSRC_HSI 0 |
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#define STM32_CFGR_PLLMUL_HSI RCC_CFGR_PLLMUL_CLKx9 |
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#define STM32_CFGR_PLLXTPRE_HSE 0 |
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#define STM32_CFGR_PLLSRC_HSE RCC_CFGR_PLLSRC |
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#define STM32_CFGR_PLLMUL_HSE RCC_CFGR_PLLMUL_CLKx8 |
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/* Use the PLL and set the SYSCLK source to be the PLL */ |
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#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL |
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#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL |
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/* AHB clock (HCLK, 36 MHz) is SYSCLK on HSI or SYSCLK/2 on HSE */ |
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#define STM32_RCC_CFGR_HPRE_HSI RCC_CFGR_HPRE_SYSCLK |
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#define STM32_RCC_CFGR_HPRE_HSE RCC_CFGR_HPRE_SYSCLKd2 |
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#define STM32_HCLK_FREQUENCY STM32_BOARD_HCLK |
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/* APB2 clock (PCLK2) is HCLK (36MHz) */ |
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK |
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#define STM32_PCLK2_FREQUENCY STM32_BOARD_HCLK |
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/* APB2 timers 1 and 8 will receive PCLK2. */ |
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#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) |
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#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) |
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/* APB1 clock (PCLK1) is HCLK (36MHz) */ |
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#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK |
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#define STM32_PCLK1_FREQUENCY STM32_BOARD_HCLK |
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/* APB1 timers 2-4 will receive PCLK1. */ |
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#define STM32_APB1_TIM2_CLKIN (STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM3_CLKIN (STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM4_CLKIN (STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) |
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/* Timer 1..8 Frequencies */ |
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#define STM32_TIM27_FREQUENCY (STM32_BOARD_HCLK) |
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#define STM32_TIM18_FREQUENCY (STM32_BOARD_HCLK) |
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/* USB divider -- Divide PLL clock by 1.5 */ |
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#define STM32_CFGR_USBPRE 0 |
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/* SDIO dividers. Note that slower clocking is required when DMA is disabled |
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* in order to avoid RX overrun/TX underrun errors due to delayed responses |
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* to service FIFOs in interrupt driven mode. |
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* |
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* SDcard default speed has max SDIO_CK freq of 25 MHz (12.5 Mbps) |
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* After selection of high speed freq may be 50 MHz (25 Mbps) |
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* Recommended default voltage: 3.3 V |
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* |
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* HCLK=36MHz, SDIOCLK=36 MHz, SDIO_CK=HCLK/(88+2)=400 KHz |
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*/ |
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#define SDIO_INIT_CLKDIV (88 << SDIO_CLKCR_CLKDIV_SHIFT) |
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/* DMA ON: HCLK=36 MHz, SDIOCLK=36MHz, SDIO_CK=HCLK/(0+2)=18 MHz |
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* DMA OFF: HCLK=36 MHz, SDIOCLK=36MHz, SDIO_CK=HCLK/(1+2)=12 MHz |
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*/ |
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#ifdef CONFIG_SDIO_DMA |
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# define SDIO_MMCXFR_CLKDIV (0 << SDIO_CLKCR_CLKDIV_SHIFT) |
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#else |
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# ifndef CONFIG_DEBUG |
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# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) |
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# else |
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# define SDIO_MMCXFR_CLKDIV (10 << SDIO_CLKCR_CLKDIV_SHIFT) |
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# endif |
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#endif |
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/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(0+2)=18 MHz |
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* DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=12 MHz |
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* Extra slow down in debug mode to get rid of underruns. |
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*/ |
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#ifdef CONFIG_SDIO_DMA |
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# define SDIO_SDXFR_CLKDIV (0 << SDIO_CLKCR_CLKDIV_SHIFT) |
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#else |
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# ifndef CONFIG_DEBUG |
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# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) |
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# else |
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# define SDIO_SDXFR_CLKDIV (10 << SDIO_CLKCR_CLKDIV_SHIFT) |
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# endif |
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#endif |
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/* LED definitions ******************************************************************/ |
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/* The VSN has one LED that we will encode as: */ |
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#define LED_STARTED 0 /* ... */ |
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#define LED_HEAPALLOCATE 1 /* ... */ |
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#define LED_IRQSENABLED 2 /* ... */ |
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#define LED_STACKCREATED 3 /* ... */ |
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#define LED_INIRQ 4 /* ... */ |
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#define LED_SIGNAL 5 /* ... */ |
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#define LED_ASSERTION 6 /* ... */ |
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#define LED_PANIC 7 /* ... */ |
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#define LED_IDLE 8 /* shows idle state */ |
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/************************************************************************************ |
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* Public Data |
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************************************************************************************/ |
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#ifndef __ASSEMBLY__ |
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#undef EXTERN |
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#if defined(__cplusplus) |
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#define EXTERN extern "C" |
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extern "C" { |
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#else |
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#define EXTERN extern |
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#endif |
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/************************************************************************************ |
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* Board Clock Configuration, called immediatelly after boot |
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************************************************************************************/ |
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/************************************************************************************ |
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* Name: stm32_boardinitialize |
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* |
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* Description: |
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* All STM32 architectures must provide the following entry point. This entry point |
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* is called early in the intitialization -- after all memory has been configured |
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* and mapped but before any devices have been initialized. |
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* |
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************************************************************************************/ |
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EXTERN void stm32_boardinitialize(void); |
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/************************************************************************************ |
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* Name: stm32_board_clockconfig |
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* |
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* Description: |
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* Any STM32 board may replace the "standard" board clock configuration logic with |
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* its own, custom clock cofiguration logic. |
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* |
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************************************************************************************/ |
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#ifdef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG |
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EXTERN void stm32_board_clockconfig(void); |
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#endif |
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/************************************************************************************ |
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* Button support. (TODO: button is not yet supported) |
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************************************************************************************/ |
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#ifdef CONFIG_ARCH_BUTTONS |
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EXTERN void up_buttoninit(void); |
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EXTERN uint8_t up_buttons(void); |
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#endif |
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#undef EXTERN |
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#if defined(__cplusplus) |
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} |
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#endif |
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#endif /* __ASSEMBLY__ */ |
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#endif /* __ARCH_BOARD_BOARD_H */
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