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1046 lines
31 KiB
1046 lines
31 KiB
/************************************************************************************** |
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* drivers/lcd/ug-9664hswag01.c |
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* Driver for the Univision UG-9664HSWAG01 Display with the Solomon Systech SSD1305 LCD |
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* controller. |
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* |
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* Copyright (C) 2011 Gregory Nutt. All rights reserved. |
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* Author: Gregory Nutt <gnutt@nuttx.org> |
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* |
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* Reference: "Product Specification, OEL Display Module, UG-9664HSWAG01", Univision |
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* Technology Inc., SAS1-6020-B, January 3, 2008. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* 3. Neither the name NuttX nor the names of its contributors may be |
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* used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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* |
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**************************************************************************************/ |
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/************************************************************************************** |
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* Included Files |
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**************************************************************************************/ |
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#include <nuttx/config.h> |
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#include <sys/types.h> |
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#include <stdint.h> |
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#include <stdbool.h> |
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#include <string.h> |
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#include <errno.h> |
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#include <debug.h> |
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|
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#include <nuttx/arch.h> |
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#include <nuttx/spi.h> |
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#include <nuttx/lcd/lcd.h> |
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#include <nuttx/lcd/ug-9664hswag01.h> |
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#include "ssd1305.h" |
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/************************************************************************************** |
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* Pre-processor Definitions |
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**************************************************************************************/ |
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/* Configuration **********************************************************************/ |
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/* UG-9664HSWAG01 Configuration Settings: |
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* |
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* CONFIG_UG9664HSWAG01_SPIMODE - Controls the SPI mode |
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* CONFIG_UG9664HSWAG01_FREQUENCY - Define to use a different bus frequency |
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* CONFIG_UG9664HSWAG01_NINTERFACES - Specifies the number of physical |
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* UG-9664HSWAG01 devices that will be supported. NOTE: At present, this |
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* must be undefined or defined to be 1. |
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* CONFIG_UG9664HSWAG01_POWER |
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* If the hardware supports a controllable OLED a power supply, this |
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* configuration shold be defined. (See ug_power() below). |
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* |
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* Required LCD driver settings: |
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* CONFIG_LCD_UG9664HSWAG01 - Enable UG-9664HSWAG01 support |
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* CONFIG_LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted. |
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* CONFIG_LCD_MAXPOWER should be 2: 0=off, 1=dim, 2=normal |
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* |
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* Required SPI driver settings: |
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* CONFIG_SPI_CMDDATA - Include support for cmd/data selection. |
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*/ |
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/* Verify that all configuration requirements have been met */ |
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/* The UG-9664HSWAG01 spec says that is supports SPI mode 0,0 only. However, somtimes |
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* you need to tinker with these things. |
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*/ |
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#ifndef CONFIG_UG9664HSWAG01_SPIMODE |
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# define CONFIG_UG9664HSWAG01_SPIMODE SPIDEV_MODE0 |
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#endif |
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/* SPI frequency */ |
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#ifndef CONFIG_UG9664HSWAG01_FREQUENCY |
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# define CONFIG_UG9664HSWAG01_FREQUENCY 3500000 |
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#endif |
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/* CONFIG_UG9664HSWAG01_NINTERFACES determines the number of physical interfaces |
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* that will be supported. |
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*/ |
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#ifndef CONFIG_UG9664HSWAG01_NINTERFACES |
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# define CONFIG_UG9664HSWAG01_NINTERFACES 1 |
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#endif |
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#if CONFIG_UG9664HSWAG01_NINTERFACES != 1 |
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# warning "Only a single UG-9664HSWAG01 interface is supported" |
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# undef CONFIG_UG9664HSWAG01_NINTERFACES |
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# define CONFIG_UG9664HSWAG01_NINTERFACES 1 |
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#endif |
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/* Verbose debug must also be enabled to use the extra OLED debug */ |
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#ifndef CONFIG_DEBUG |
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# undef CONFIG_DEBUG_VERBOSE |
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#endif |
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#ifndef CONFIG_DEBUG_VERBOSE |
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# undef CONFIG_DEBUG_LCD |
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#endif |
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/* Check contrast selection */ |
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#ifndef CONFIG_LCD_MAXCONTRAST |
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# define CONFIG_LCD_MAXCONTRAST 255 |
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#endif |
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#if CONFIG_LCD_MAXCONTRAST <= 0 || CONFIG_LCD_MAXCONTRAST > 255 |
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# error "CONFIG_LCD_MAXCONTRAST exceeds supported maximum" |
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#endif |
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#if CONFIG_LCD_MAXCONTRAST < 255 |
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# warning "Optimal setting of CONFIG_LCD_MAXCONTRAST is 255" |
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#endif |
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/* Check power setting */ |
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#if !defined(CONFIG_LCD_MAXPOWER) |
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# define CONFIG_LCD_MAXPOWER 2 |
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#endif |
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#if CONFIG_LCD_MAXPOWER != 2 |
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# warning "CONFIG_LCD_MAXPOWER should be 2" |
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# undef CONFIG_LCD_MAXPOWER |
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# define CONFIG_LCD_MAXPOWER 2 |
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#endif |
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/* The OLED requires CMD/DATA SPI support */ |
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#ifndef CONFIG_SPI_CMDDATA |
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# error "CONFIG_SPI_CMDDATA must be defined in your NuttX configuration" |
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#endif |
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/* Color is 1bpp monochrome with leftmost column contained in bits 0 */ |
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#ifdef CONFIG_NX_DISABLE_1BPP |
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# warning "1 bit-per-pixel support needed" |
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#endif |
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/* Color Properties *******************************************************************/ |
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/* The SSD1305 display controller can handle a resolution of 132x64. The OLED |
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* on the base board is 96x64. |
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*/ |
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#define UG_DEV_XRES 132 |
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#define UG_XOFFSET 18 |
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/* Display Resolution */ |
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#define UG_XRES 96 |
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#define UG_YRES 64 |
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/* Color depth and format */ |
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#define UG_BPP 1 |
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#define UG_COLORFMT FB_FMT_Y1 |
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/* Bytes per logical row and actual device row */ |
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#define UG_XSTRIDE (UG_XRES >> 3) /* Pixels arrange "horizontally for user" */ |
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#define UG_YSTRIDE (UG_YRES >> 3) /* But actual device arrangement is "vertical" */ |
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/* The size of the shadow frame buffer */ |
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#define UG_FBSIZE (UG_XRES * UG_YSTRIDE) |
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/* Bit helpers */ |
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#define LS_BIT (1 << 0) |
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#define MS_BIT (1 << 7) |
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/* Debug ******************************************************************************/ |
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#ifdef CONFIG_DEBUG_LCD |
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# define lcddbg(format, arg...) vdbg(format, ##arg) |
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#else |
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# define lcddbg(x...) |
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#endif |
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/************************************************************************************** |
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* Private Type Definition |
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**************************************************************************************/ |
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/* This structure describes the state of this driver */ |
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struct ug_dev_s |
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{ |
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/* Publically visible device structure */ |
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struct lcd_dev_s dev; |
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/* Private LCD-specific information follows */ |
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FAR struct spi_dev_s *spi; |
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uint8_t contrast; |
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uint8_t powered; |
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/* The SSD1305 does not support reading from the display memory in SPI mode. |
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* Since there is 1 BPP and access is byte-by-byte, it is necessary to keep |
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* a shadow copy of the framebuffer memory. |
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*/ |
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uint8_t fb[UG_FBSIZE]; |
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}; |
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/************************************************************************************** |
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* Private Function Protototypes |
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**************************************************************************************/ |
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/* SPI helpers */ |
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#ifdef CONFIG_SPI_OWNBUS |
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static inline void ug_select(FAR struct spi_dev_s *spi); |
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static inline void ug_deselect(FAR struct spi_dev_s *spi); |
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#else |
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static void ug_select(FAR struct spi_dev_s *spi); |
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static void ug_deselect(FAR struct spi_dev_s *spi); |
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#endif |
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/* LCD Data Transfer Methods */ |
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static int ug_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, |
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size_t npixels); |
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static int ug_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, |
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size_t npixels); |
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/* LCD Configuration */ |
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static int ug_getvideoinfo(FAR struct lcd_dev_s *dev, |
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FAR struct fb_videoinfo_s *vinfo); |
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static int ug_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, |
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FAR struct lcd_planeinfo_s *pinfo); |
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/* LCD RGB Mapping */ |
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#ifdef CONFIG_FB_CMAP |
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# error "RGB color mapping not supported by this driver" |
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#endif |
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/* Cursor Controls */ |
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#ifdef CONFIG_FB_HWCURSOR |
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# error "Cursor control not supported by this driver" |
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#endif |
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/* LCD Specific Controls */ |
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static int ug_getpower(struct lcd_dev_s *dev); |
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static int ug_setpower(struct lcd_dev_s *dev, int power); |
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static int ug_getcontrast(struct lcd_dev_s *dev); |
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static int ug_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); |
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/* Initialization */ |
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static inline void up_clear(FAR struct ug_dev_s *priv); |
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/************************************************************************************** |
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* Private Data |
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**************************************************************************************/ |
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/* This is working memory allocated by the LCD driver for each LCD device |
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* and for each color plane. This memory will hold one raster line of data. |
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* The size of the allocated run buffer must therefore be at least |
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* (bpp * xres / 8). Actual alignment of the buffer must conform to the |
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* bitwidth of the underlying pixel type. |
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* |
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* If there are multiple planes, they may share the same working buffer |
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* because different planes will not be operate on concurrently. However, |
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* if there are multiple LCD devices, they must each have unique run buffers. |
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*/ |
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static uint8_t g_runbuffer[UG_XSTRIDE+1]; |
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/* This structure describes the overall LCD video controller */ |
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static const struct fb_videoinfo_s g_videoinfo = |
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{ |
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.fmt = UG_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ |
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.xres = UG_XRES, /* Horizontal resolution in pixel columns */ |
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.yres = UG_YRES, /* Vertical resolution in pixel rows */ |
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.nplanes = 1, /* Number of color planes supported */ |
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}; |
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/* This is the standard, NuttX Plane information object */ |
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static const struct lcd_planeinfo_s g_planeinfo = |
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{ |
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.putrun = ug_putrun, /* Put a run into LCD memory */ |
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.getrun = ug_getrun, /* Get a run from LCD memory */ |
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.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ |
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.bpp = UG_BPP, /* Bits-per-pixel */ |
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}; |
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/* This is the standard, NuttX LCD driver object */ |
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static struct ug_dev_s g_ugdev = |
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{ |
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.dev = |
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{ |
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/* LCD Configuration */ |
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.getvideoinfo = ug_getvideoinfo, |
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.getplaneinfo = ug_getplaneinfo, |
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/* LCD RGB Mapping -- Not supported */ |
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/* Cursor Controls -- Not supported */ |
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/* LCD Specific Controls */ |
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.getpower = ug_getpower, |
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.setpower = ug_setpower, |
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.getcontrast = ug_getcontrast, |
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.setcontrast = ug_setcontrast, |
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}, |
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}; |
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/************************************************************************************** |
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* Private Functions |
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**************************************************************************************/ |
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/************************************************************************************** |
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* Name: ug_powerstring |
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* |
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* Description: |
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* Convert the power setting to a string. |
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* |
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**************************************************************************************/ |
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static inline FAR const char *ug_powerstring(uint8_t power) |
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{ |
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if (power == UG_POWER_OFF) |
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{ |
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return "OFF"; |
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} |
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else if (power == UG_POWER_DIM) |
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{ |
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return "DIM"; |
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} |
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else if (power == UG_POWER_ON) |
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{ |
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return "ON"; |
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} |
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else |
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{ |
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return "ERROR"; |
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} |
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} |
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/************************************************************************************** |
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* Function: ug_select |
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* |
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* Description: |
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* Select the SPI, locking and re-configuring if necessary |
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* |
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* Parameters: |
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* spi - Reference to the SPI driver structure |
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* |
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* Returned Value: |
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* None |
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* |
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* Assumptions: |
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* |
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**************************************************************************************/ |
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#ifdef CONFIG_SPI_OWNBUS |
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static inline void ug_select(FAR struct spi_dev_s *spi) |
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{ |
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/* We own the SPI bus, so just select the chip */ |
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SPI_SELECT(spi, SPIDEV_DISPLAY, true); |
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} |
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#else |
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static void ug_select(FAR struct spi_dev_s *spi) |
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{ |
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/* Select UG-9664HSWAG01 chip (locking the SPI bus in case there are multiple |
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* devices competing for the SPI bus |
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*/ |
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SPI_LOCK(spi, true); |
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SPI_SELECT(spi, SPIDEV_DISPLAY, true); |
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/* Now make sure that the SPI bus is configured for the UG-9664HSWAG01 (it |
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* might have gotten configured for a different device while unlocked) |
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*/ |
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SPI_SETMODE(spi, CONFIG_UG9664HSWAG01_SPIMODE); |
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SPI_SETBITS(spi, 8); |
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#ifdef CONFIG_UG9664HSWAG01_FREQUENCY |
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SPI_SETFREQUENCY(spi, CONFIG_UG9664HSWAG01_FREQUENCY); |
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#endif |
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} |
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#endif |
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/************************************************************************************** |
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* Function: ug_deselect |
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* |
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* Description: |
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* De-select the SPI |
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* |
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* Parameters: |
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* spi - Reference to the SPI driver structure |
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* |
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* Returned Value: |
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* None |
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* |
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* Assumptions: |
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* |
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**************************************************************************************/ |
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#ifdef CONFIG_SPI_OWNBUS |
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static inline void ug_deselect(FAR struct spi_dev_s *spi) |
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{ |
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/* We own the SPI bus, so just de-select the chip */ |
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SPI_SELECT(spi, SPIDEV_DISPLAY, false); |
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} |
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#else |
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static void ug_deselect(FAR struct spi_dev_s *spi) |
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{ |
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/* De-select UG-9664HSWAG01 chip and relinquish the SPI bus. */ |
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SPI_SELECT(spi, SPIDEV_DISPLAY, false); |
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SPI_LOCK(spi, false); |
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} |
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#endif |
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/************************************************************************************** |
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* Name: ug_putrun |
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* |
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* Description: |
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* This method can be used to write a partial raster line to the LCD: |
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* |
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* row - Starting row to write to (range: 0 <= row < yres) |
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* col - Starting column to write to (range: 0 <= col <= xres-npixels) |
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* buffer - The buffer containing the run to be written to the LCD |
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* npixels - The number of pixels to write to the LCD |
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* (range: 0 < npixels <= xres-col) |
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* |
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**************************************************************************************/ |
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static int ug_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, |
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size_t npixels) |
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{ |
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/* Because of this line of code, we will only be able to support a single UG device */ |
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FAR struct ug_dev_s *priv = &g_ugdev; |
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FAR uint8_t *fbptr; |
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FAR uint8_t *ptr; |
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uint8_t devcol; |
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uint8_t fbmask; |
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uint8_t page; |
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uint8_t usrmask; |
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uint8_t i; |
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int pixlen; |
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gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); |
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DEBUGASSERT(buffer); |
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/* Clip the run to the display */ |
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pixlen = npixels; |
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if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)UG_XRES) |
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{ |
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pixlen = (int)UG_XRES - (int)col; |
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} |
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/* Verify that some portion of the run remains on the display */ |
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if (pixlen <= 0 || row > UG_YRES) |
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{ |
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return OK; |
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} |
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/* Get the page number. The range of 64 lines is divided up into eight |
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* pages of 8 lines each. |
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*/ |
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page = row >> 3; |
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|
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/* Update the shadow frame buffer memory. First determine the pixel |
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* position in the frame buffer memory. Pixels are organized like |
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* this: |
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* |
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* --------+---+---+---+---+-...-+-----+ |
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* Segment | 0 | 1 | 2 | 3 | ... | 131 | |
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* --------+---+---+---+---+-...-+-----+ |
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* Bit 0 | | X | | | | | |
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* Bit 1 | | X | | | | | |
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* Bit 2 | | X | | | | | |
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* Bit 3 | | X | | | | | |
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* Bit 4 | | X | | | | | |
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* Bit 5 | | X | | | | | |
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* Bit 6 | | X | | | | | |
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* Bit 7 | | X | | | | | |
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* --------+---+---+---+---+-...-+-----+ |
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* |
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* So, in order to draw a white, horizontal line, at row 45. we |
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* would have to modify all of the bytes in page 45/8 = 5. We |
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* would have to set bit 45%8 = 5 in every byte in the page. |
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*/ |
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fbmask = 1 << (row & 7); |
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fbptr = &priv->fb[page * UG_XRES + col]; |
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ptr = fbptr; |
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#ifdef CONFIG_NX_PACKEDMSFIRST |
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usrmask = MS_BIT; |
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#else |
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usrmask = LS_BIT; |
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#endif |
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for (i = 0; i < pixlen; i++) |
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{ |
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/* Set or clear the corresponding bit */ |
|
|
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if ((*buffer & usrmask) != 0) |
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{ |
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*ptr++ |= fbmask; |
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} |
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else |
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{ |
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*ptr++ &= ~fbmask; |
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} |
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|
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/* Inc/Decrement to the next source pixel */ |
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#ifdef CONFIG_NX_PACKEDMSFIRST |
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if (usrmask == LS_BIT) |
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{ |
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buffer++; |
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usrmask = MS_BIT; |
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} |
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else |
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{ |
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usrmask >>= 1; |
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} |
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#else |
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if (usrmask == MS_BIT) |
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{ |
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buffer++; |
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usrmask = LS_BIT; |
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} |
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else |
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{ |
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usrmask <<= 1; |
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} |
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#endif |
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} |
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|
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/* Offset the column position to account for smaller horizontal |
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* display range. |
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*/ |
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|
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devcol = col + UG_XOFFSET; |
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|
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/* Select and lock the device */ |
|
|
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ug_select(priv->spi); |
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|
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/* Select command transfer */ |
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SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, true); |
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|
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/* Set the starting position for the run */ |
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|
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(void)SPI_SEND(priv->spi, SSD1305_SETPAGESTART+page); /* Set the page start */ |
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(void)SPI_SEND(priv->spi, SSD1305_SETCOLL + (devcol & 0x0f)); /* Set the low column */ |
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(void)SPI_SEND(priv->spi, SSD1305_SETCOLH + (devcol >> 4)); /* Set the high column */ |
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|
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/* Select data transfer */ |
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|
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SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, false); |
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|
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/* Then transfer all of the data */ |
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|
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(void)SPI_SNDBLOCK(priv->spi, fbptr, pixlen); |
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|
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/* Unlock and de-select the device */ |
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|
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ug_deselect(priv->spi); |
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return OK; |
|
} |
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|
|
/************************************************************************************** |
|
* Name: ug_getrun |
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* |
|
* Description: |
|
* This method can be used to read a partial raster line from the LCD: |
|
* |
|
* row - Starting row to read from (range: 0 <= row < yres) |
|
* col - Starting column to read read (range: 0 <= col <= xres-npixels) |
|
* buffer - The buffer in which to return the run read from the LCD |
|
* npixels - The number of pixels to read from the LCD |
|
* (range: 0 < npixels <= xres-col) |
|
* |
|
**************************************************************************************/ |
|
|
|
static int ug_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, |
|
size_t npixels) |
|
{ |
|
/* Because of this line of code, we will only be able to support a single UG device */ |
|
|
|
FAR struct ug_dev_s *priv = &g_ugdev; |
|
FAR uint8_t *fbptr; |
|
uint8_t page; |
|
uint8_t fbmask; |
|
uint8_t usrmask; |
|
uint8_t i; |
|
int pixlen; |
|
|
|
gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels); |
|
DEBUGASSERT(buffer); |
|
|
|
/* Clip the run to the display */ |
|
|
|
pixlen = npixels; |
|
if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)UG_XRES) |
|
{ |
|
pixlen = (int)UG_XRES - (int)col; |
|
} |
|
|
|
/* Verify that some portion of the run is actually the display */ |
|
|
|
if (pixlen <= 0 || row > UG_YRES) |
|
{ |
|
return -EINVAL; |
|
} |
|
|
|
/* Then transfer the display data from the shadow frame buffer memory */ |
|
/* Get the page number. The range of 64 lines is divided up into eight |
|
* pages of 8 lines each. |
|
*/ |
|
|
|
page = row >> 3; |
|
|
|
/* Update the shadow frame buffer memory. First determine the pixel |
|
* position in the frame buffer memory. Pixels are organized like |
|
* this: |
|
* |
|
* --------+---+---+---+---+-...-+-----+ |
|
* Segment | 0 | 1 | 2 | 3 | ... | 131 | |
|
* --------+---+---+---+---+-...-+-----+ |
|
* Bit 0 | | X | | | | | |
|
* Bit 1 | | X | | | | | |
|
* Bit 2 | | X | | | | | |
|
* Bit 3 | | X | | | | | |
|
* Bit 4 | | X | | | | | |
|
* Bit 5 | | X | | | | | |
|
* Bit 6 | | X | | | | | |
|
* Bit 7 | | X | | | | | |
|
* --------+---+---+---+---+-...-+-----+ |
|
* |
|
* So, in order to draw a white, horizontal line, at row 45. we |
|
* would have to modify all of the bytes in page 45/8 = 5. We |
|
* would have to set bit 45%8 = 5 in every byte in the page. |
|
*/ |
|
|
|
fbmask = 1 << (row & 7); |
|
fbptr = &priv->fb[page * UG_XRES + col]; |
|
#ifdef CONFIG_NX_PACKEDMSFIRST |
|
usrmask = MS_BIT; |
|
#else |
|
usrmask = LS_BIT; |
|
#endif |
|
|
|
*buffer = 0; |
|
for (i = 0; i < pixlen; i++) |
|
{ |
|
/* Set or clear the corresponding bit */ |
|
|
|
uint8_t byte = *fbptr++; |
|
if ((byte & fbmask) != 0) |
|
{ |
|
*buffer |= usrmask; |
|
} |
|
|
|
/* Inc/Decrement to the next destination pixel. Hmmmm. It looks like |
|
* this logic could write past the end of the user buffer. Revisit |
|
* this! |
|
*/ |
|
|
|
#ifdef CONFIG_NX_PACKEDMSFIRST |
|
if (usrmask == LS_BIT) |
|
{ |
|
buffer++; |
|
*buffer = 0; |
|
usrmask = MS_BIT; |
|
} |
|
else |
|
{ |
|
usrmask >>= 1; |
|
} |
|
#else |
|
if (usrmask == MS_BIT) |
|
{ |
|
buffer++; |
|
*buffer = 0; |
|
usrmask = LS_BIT; |
|
} |
|
else |
|
{ |
|
usrmask <<= 1; |
|
} |
|
#endif |
|
} |
|
|
|
return OK; |
|
} |
|
|
|
/************************************************************************************** |
|
* Name: ug_getvideoinfo |
|
* |
|
* Description: |
|
* Get information about the LCD video controller configuration. |
|
* |
|
**************************************************************************************/ |
|
|
|
static int ug_getvideoinfo(FAR struct lcd_dev_s *dev, |
|
FAR struct fb_videoinfo_s *vinfo) |
|
{ |
|
DEBUGASSERT(dev && vinfo); |
|
gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n", |
|
g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes); |
|
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s)); |
|
return OK; |
|
} |
|
|
|
/************************************************************************************** |
|
* Name: ug_getplaneinfo |
|
* |
|
* Description: |
|
* Get information about the configuration of each LCD color plane. |
|
* |
|
**************************************************************************************/ |
|
|
|
static int ug_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno, |
|
FAR struct lcd_planeinfo_s *pinfo) |
|
{ |
|
DEBUGASSERT(dev && pinfo && planeno == 0); |
|
gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp); |
|
memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s)); |
|
return OK; |
|
} |
|
|
|
/************************************************************************************** |
|
* Name: ug_getpower |
|
* |
|
* Description: |
|
* Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On |
|
* backlit LCDs, this setting may correspond to the backlight setting. |
|
* |
|
**************************************************************************************/ |
|
|
|
static int ug_getpower(struct lcd_dev_s *dev) |
|
{ |
|
struct ug_dev_s *priv = (struct ug_dev_s *)dev; |
|
DEBUGASSERT(priv); |
|
gvdbg("powered: %s\n", ug_powerstring(priv->powered)); |
|
return priv->powered; |
|
} |
|
|
|
/************************************************************************************** |
|
* Name: ug_setpower |
|
* |
|
* Description: |
|
* Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On |
|
* backlit LCDs, this setting may correspond to the backlight setting. |
|
* |
|
**************************************************************************************/ |
|
|
|
static int ug_setpower(struct lcd_dev_s *dev, int power) |
|
{ |
|
struct ug_dev_s *priv = (struct ug_dev_s *)dev; |
|
|
|
DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER); |
|
gvdbg("power: %s powered: %s\n", |
|
ug_powerstring(power), ug_powerstring(priv->powered)); |
|
|
|
/* Select and lock the device */ |
|
|
|
ug_select(priv->spi); |
|
if (power <= UG_POWER_OFF) |
|
{ |
|
/* Turn the display off */ |
|
|
|
(void)SPI_SEND(priv->spi, SSD1305_DISPOFF); /* Display off */ |
|
|
|
/* Remove power to the device */ |
|
|
|
ug_power(0, false); |
|
priv->powered = UG_POWER_OFF; |
|
} |
|
else |
|
{ |
|
/* Turn the display on, dim or normal */ |
|
|
|
if (power == UG_POWER_DIM) |
|
{ |
|
(void)SPI_SEND(priv->spi, SSD1305_DISPONDIM); /* Display on, dim mode */ |
|
} |
|
else /* if (power > UG_POWER_DIM) */ |
|
{ |
|
(void)SPI_SEND(priv->spi, SSD1305_DISPON); /* Display on, normal mode */ |
|
power = UG_POWER_ON; |
|
} |
|
(void)SPI_SEND(priv->spi, SSD1305_DISPRAM); /* Resume to RAM content display */ |
|
|
|
/* Restore power to the device */ |
|
|
|
ug_power(0, true); |
|
priv->powered = power; |
|
} |
|
ug_deselect(priv->spi); |
|
|
|
return OK; |
|
} |
|
|
|
/************************************************************************************** |
|
* Name: ug_getcontrast |
|
* |
|
* Description: |
|
* Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). |
|
* |
|
**************************************************************************************/ |
|
|
|
static int ug_getcontrast(struct lcd_dev_s *dev) |
|
{ |
|
struct ug_dev_s *priv = (struct ug_dev_s *)dev; |
|
DEBUGASSERT(priv); |
|
return (int)priv->contrast; |
|
} |
|
|
|
/************************************************************************************** |
|
* Name: ug_setcontrast |
|
* |
|
* Description: |
|
* Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). |
|
* |
|
**************************************************************************************/ |
|
|
|
static int ug_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) |
|
{ |
|
struct ug_dev_s *priv = (struct ug_dev_s *)dev; |
|
|
|
gvdbg("contrast: %d\n", contrast); |
|
DEBUGASSERT(priv); |
|
|
|
if (contrast > 255) |
|
{ |
|
return -EINVAL; |
|
} |
|
|
|
/* Select and lock the device */ |
|
|
|
ug_select(priv->spi); |
|
|
|
/* Select command transfer */ |
|
|
|
SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, true); |
|
|
|
/* Set the contrast */ |
|
|
|
(void)SPI_SEND(priv->spi, SSD1305_SETCONTRAST); /* Set contrast control register */ |
|
(void)SPI_SEND(priv->spi, contrast); /* Data 1: Set 1 of 256 contrast steps */ |
|
priv->contrast = contrast; |
|
|
|
/* Unlock and de-select the device */ |
|
|
|
ug_deselect(priv->spi); |
|
return OK; |
|
} |
|
|
|
/************************************************************************************** |
|
* Name: up_clear |
|
* |
|
* Description: |
|
* Clear the display. |
|
* |
|
**************************************************************************************/ |
|
|
|
static inline void up_clear(FAR struct ug_dev_s *priv) |
|
{ |
|
FAR struct spi_dev_s *spi = priv->spi; |
|
int page; |
|
int i; |
|
|
|
/* Clear the framebuffer */ |
|
|
|
memset(priv->fb, UG_Y1_BLACK, UG_FBSIZE); |
|
|
|
/* Select and lock the device */ |
|
|
|
ug_select(priv->spi); |
|
|
|
/* Go through all 8 pages */ |
|
|
|
for (page = 0, i = 0; i < 8; i++) |
|
{ |
|
/* Select command transfer */ |
|
|
|
SPI_CMDDATA(spi, SPIDEV_DISPLAY, true); |
|
|
|
/* Set the starting position for the run */ |
|
|
|
(void)SPI_SEND(priv->spi, SSD1305_SETPAGESTART+i); |
|
(void)SPI_SEND(priv->spi, SSD1305_SETCOLL + (UG_XOFFSET & 0x0f)); |
|
(void)SPI_SEND(priv->spi, SSD1305_SETCOLH + (UG_XOFFSET >> 4)); |
|
|
|
/* Select data transfer */ |
|
|
|
SPI_CMDDATA(spi, SPIDEV_DISPLAY, false); |
|
|
|
/* Then transfer all 96 columns of data */ |
|
|
|
(void)SPI_SNDBLOCK(priv->spi, &priv->fb[page * UG_XRES], UG_XRES); |
|
} |
|
|
|
/* Unlock and de-select the device */ |
|
|
|
ug_deselect(spi); |
|
} |
|
|
|
/************************************************************************************** |
|
* Public Functions |
|
**************************************************************************************/ |
|
|
|
/************************************************************************************** |
|
* Name: ug_initialize |
|
* |
|
* Description: |
|
* Initialize the UG-9664HSWAG01 video hardware. The initial state of the |
|
* OLED is fully initialized, display memory cleared, and the OLED ready to |
|
* use, but with the power setting at 0 (full off == sleep mode). |
|
* |
|
* Input Parameters: |
|
* |
|
* spi - A reference to the SPI driver instance. |
|
* devno - A value in the range of 0 through CONFIG_UG9664HSWAG01_NINTERFACES-1. |
|
* This allows support for multiple OLED devices. |
|
* |
|
* Returned Value: |
|
* |
|
* On success, this function returns a reference to the LCD object for the specified |
|
* OLED. NULL is returned on any failure. |
|
* |
|
**************************************************************************************/ |
|
|
|
FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned int devno) |
|
{ |
|
/* Configure and enable LCD */ |
|
|
|
FAR struct ug_dev_s *priv = &g_ugdev; |
|
|
|
gvdbg("Initializing\n"); |
|
DEBUGASSERT(spi && devno == 0); |
|
|
|
/* Save the reference to the SPI device */ |
|
|
|
priv->spi = spi; |
|
|
|
/* Select and lock the device */ |
|
|
|
ug_select(spi); |
|
|
|
/* Make sure that the OLED off */ |
|
|
|
ug_power(0, false); |
|
|
|
/* Select command transfer */ |
|
|
|
SPI_CMDDATA(spi, SPIDEV_DISPLAY, true); |
|
|
|
/* Configure the device */ |
|
|
|
(void)SPI_SEND(spi, SSD1305_SETCOLL + 2); /* Set low column address */ |
|
(void)SPI_SEND(spi, SSD1305_SETCOLH + 2); /* Set high column address */ |
|
(void)SPI_SEND(spi, SSD1305_SETSTARTLINE+0); /* Display start set */ |
|
(void)SPI_SEND(spi, SSD1305_SCROLL_STOP); /* Stop horizontal scroll */ |
|
(void)SPI_SEND(spi, SSD1305_SETCONTRAST); /* Set contrast control register */ |
|
(void)SPI_SEND(spi, 0x32); /* Data 1: Set 1 of 256 contrast steps */ |
|
(void)SPI_SEND(spi, SSD1305_SETBRIGHTNESS); /* Brightness for color bank */ |
|
(void)SPI_SEND(spi, 0x80); /* Data 1: Set 1 of 256 contrast steps */ |
|
(void)SPI_SEND(spi, SSD1305_MAPCOL131); /* Set segment re-map */ |
|
(void)SPI_SEND(spi, SSD1305_DISPNORMAL); /* Set normal display */ |
|
/*(void)SPI_SEND(spi, SSD1305_DISPINVERTED); Set inverse display */ |
|
(void)SPI_SEND(spi, SSD1305_SETMUX); /* Set multiplex ratio */ |
|
(void)SPI_SEND(spi, 0x3f); /* Data 1: MUX ratio -1: 15-63 */ |
|
(void)SPI_SEND(spi, SSD1305_SETOFFSET); /* Set display offset */ |
|
(void)SPI_SEND(spi, 0x40); /* Data 1: Vertical shift by COM: 0-63 */ |
|
(void)SPI_SEND(spi, SSD1305_MSTRCONFIG); /* Set dc-dc on/off */ |
|
(void)SPI_SEND(spi, SSD1305_MSTRCONFIG_EXTVCC); /* Data 1: Select external Vcc */ |
|
(void)SPI_SEND(spi, SSD1305_SETCOMREMAPPED); /* Set com output scan direction */ |
|
(void)SPI_SEND(spi, SSD1305_SETDCLK); /* Set display clock divide |
|
* ratio/oscillator/frequency */ |
|
(void)SPI_SEND(spi, 15 << SSD1305_DCLKFREQ_SHIFT | 0 << SSD1305_DCLKDIV_SHIFT); |
|
(void)SPI_SEND(spi, SSD1305_SETCOLORMODE); /* Set area color mode on/off & low power |
|
* display mode */ |
|
(void)SPI_SEND(spi, SSD1305_COLORMODE_MONO | SSD1305_POWERMODE_LOW); |
|
(void)SPI_SEND(spi, SSD1305_SETPRECHARGE); /* Set pre-charge period */ |
|
(void)SPI_SEND(spi, 15 << SSD1305_PHASE2_SHIFT | 1 << SSD1305_PHASE1_SHIFT); |
|
(void)SPI_SEND(spi, SSD1305_SETCOMCONFIG); /* Set COM configuration */ |
|
(void)SPI_SEND(spi, SSD1305_COMCONFIG_ALT); /* Data 1, Bit 4: 1=Alternative COM pin configuration */ |
|
(void)SPI_SEND(spi, SSD1305_SETVCOMHDESEL); /* Set VCOMH deselect level */ |
|
(void)SPI_SEND(spi, SSD1305_VCOMH_x7p7); /* Data 1: ~0.77 x Vcc */ |
|
(void)SPI_SEND(spi, SSD1305_SETLUT); /* Set look up table for area color */ |
|
(void)SPI_SEND(spi, 0x3f); /* Data 1: Pulse width: 31-63 */ |
|
(void)SPI_SEND(spi, 0x3f); /* Data 2: Color A: 31-63 */ |
|
(void)SPI_SEND(spi, 0x3f); /* Data 3: Color B: 31-63 */ |
|
(void)SPI_SEND(spi, 0x3f); /* Data 4: Color C: 31-63 */ |
|
(void)SPI_SEND(spi, SSD1305_DISPON); /* Display on, normal mode */ |
|
(void)SPI_SEND(spi, SSD1305_DISPRAM); /* Resume to RAM content display */ |
|
|
|
/* Let go of the SPI lock and de-select the device */ |
|
|
|
ug_deselect(spi); |
|
|
|
/* Clear the framebuffer */ |
|
|
|
up_mdelay(100); |
|
up_clear(priv); |
|
return &priv->dev; |
|
}
|
|
|