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181 lines
6.2 KiB
181 lines
6.2 KiB
diff --git NuttX/nuttx/arch/arm/src/stm32/stm32_pwr.c NuttX/nuttx/arch/arm/src/stm32/stm32_pwr.c |
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index 13fbdb3..b2aee60 100644 |
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--- NuttX/nuttx/arch/arm/src/stm32/stm32_pwr.c |
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+++ NuttX/nuttx/arch/arm/src/stm32/stm32_pwr.c |
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@@ -2,9 +2,10 @@ |
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* arch/arm/src/stm32/stm32_pwr.c |
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* |
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* Copyright (C) 2011 Uros Platise. All rights reserved. |
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- * Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved. |
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+ * Copyright (C) 2013, 2015-2017 Gregory Nutt. All rights reserved. |
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* Authors: Uros Platise <uros.platise@isotel.eu> |
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* Gregory Nutt <gnutt@nuttx.org> |
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+ * David Sidrane <david_s5@nscdg.com> |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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@@ -54,6 +55,12 @@ |
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#if defined(CONFIG_STM32_PWR) |
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/************************************************************************************ |
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+ * Private Data |
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+ ************************************************************************************/ |
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+ |
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+static uint16_t g_bkp_writable_counter = 0; |
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+ |
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+/************************************************************************************ |
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* Private Functions |
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************************************************************************************/ |
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@@ -115,6 +122,39 @@ void stm32_pwr_enablesdadc(uint8_t sdadc) |
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} |
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#endif |
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+/************************************************************************************ |
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+ * Name: stm32_pwr_initbkp |
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+ * |
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+ * Description: |
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+ * Insures the referenced count access to the backup domain (RTC registers, |
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+ * RTC backup data registers and backup SRAM is consistent with the HW state |
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+ * without relying on a variable. |
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+ * |
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+ * NOTE: This function should only be called by SoC Start up code. |
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+ * |
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+ * Input Parameters: |
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+ * writable - True: enable ability to write to backup domain registers |
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+ * |
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+ * Returned Value: |
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+ * None |
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+ * |
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+ ************************************************************************************/ |
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+ |
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+void stm32_pwr_initbkp(bool writable) |
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+{ |
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+ uint16_t regval; |
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+ |
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+ /* Make the HW not writable */ |
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+ |
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+ regval = stm32_pwr_getreg(STM32_PWR_CR_OFFSET); |
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+ regval &= ~PWR_CR_DBP; |
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+ stm32_pwr_putreg(STM32_PWR_CR_OFFSET, regval); |
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+ |
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+ /* Make the reference count agree */ |
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+ |
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+ g_bkp_writable_counter = 0; |
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+ stm32_pwr_enablebkp(writable); |
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+} |
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/************************************************************************************ |
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* Name: stm32_pwr_enablebkp |
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@@ -137,7 +177,6 @@ void stm32_pwr_enablesdadc(uint8_t sdadc) |
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void stm32_pwr_enablebkp(bool writable) |
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{ |
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- static uint16_t writable_counter = 0; |
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irqstate_t flags; |
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uint16_t regval; |
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bool waswritable; |
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@@ -152,24 +191,24 @@ void stm32_pwr_enablebkp(bool writable) |
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if (writable) |
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{ |
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- DEBUGASSERT(writable_counter < UINT16_MAX); |
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- writable_counter++; |
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+ DEBUGASSERT(g_bkp_writable_counter < UINT16_MAX); |
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+ g_bkp_writable_counter++; |
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} |
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- else if (writable_counter > 0) |
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+ else if (g_bkp_writable_counter > 0) |
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{ |
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- writable_counter--; |
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+ g_bkp_writable_counter--; |
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} |
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/* Enable or disable the ability to write */ |
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- if (waswritable && writable_counter == 0) |
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+ if (waswritable && g_bkp_writable_counter == 0) |
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{ |
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/* Disable backup domain access */ |
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regval &= ~PWR_CR_DBP; |
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stm32_pwr_putreg(STM32_PWR_CR_OFFSET, regval); |
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} |
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- else if (!waswritable && writable_counter > 0) |
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+ else if (!waswritable && g_bkp_writable_counter > 0) |
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{ |
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/* Enable backup domain access */ |
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diff --git NuttX/nuttx/arch/arm/src/stm32/stm32_pwr.h NuttX/nuttx/arch/arm/src/stm32/stm32_pwr.h |
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index 700dd60..ab33eb9 100644 |
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--- NuttX/nuttx/arch/arm/src/stm32/stm32_pwr.h |
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+++ NuttX/nuttx/arch/arm/src/stm32/stm32_pwr.h |
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@@ -1,8 +1,9 @@ |
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/************************************************************************************ |
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* arch/arm/src/stm32/stm32_pwr.h |
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* |
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- * Copyright (C) 2009, 2013, 2015 Gregory Nutt. All rights reserved. |
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- * Author: Gregory Nutt <gnutt@nuttx.org> |
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+ * Copyright (C) 2009, 2013, 2015, 2017 Gregory Nutt. All rights reserved. |
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+ * Authors: Gregory Nutt <gnutt@nuttx.org> |
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+ * David Sidrane <david_s5@nscdg.com> |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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@@ -85,6 +86,27 @@ void stm32_pwr_enablesdadc(uint8_t sdadc); |
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#endif |
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/************************************************************************************ |
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+ * Name: stm32_pwr_initbkp |
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+ * |
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+ * Description: |
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+ * Insures the referenced count access to the backup domain (RTC registers, |
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+ * RTC backup data registers and backup SRAM is consistent with the HW state |
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+ * without relying on a variable. |
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+ * |
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+ * NOTE: This function should only be called by SoC Start up code. |
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+ * |
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+ * Input Parameters: |
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+ * writable - set the initial state of the enable and the |
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+ * bkp_writable_counter |
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+ * |
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+ * Returned Value: |
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+ * None |
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+ * |
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+ ************************************************************************************/ |
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+ |
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+void stm32_pwr_initbkp(bool writable); |
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+ |
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+/************************************************************************************ |
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* Name: stm32_pwr_enablebkp |
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* |
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* Description: |
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diff --git NuttX/nuttx/arch/arm/src/stm32/stm32_rcc.c NuttX/nuttx/arch/arm/src/stm32/stm32_rcc.c |
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index cf3c115..71fd4f7 100644 |
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--- NuttX/nuttx/arch/arm/src/stm32/stm32_rcc.c |
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+++ NuttX/nuttx/arch/arm/src/stm32/stm32_rcc.c |
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@@ -1,8 +1,9 @@ |
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/**************************************************************************** |
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* arch/arm/src/stm32/stm32_rcc.c |
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* |
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- * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. |
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- * Author: Gregory Nutt <gnutt@nuttx.org> |
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+ * Copyright (C) 2009, 2011-2012, 2017 Gregory Nutt. All rights reserved. |
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+ * Authors: Gregory Nutt <gnutt@nuttx.org> |
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+ * David Sidrane <david_s5@nscdg.com> |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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@@ -125,9 +126,12 @@ static inline void rcc_resetbkp(void) |
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/* Check if the RTC is already configured */ |
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+ stm32_pwr_initbkp(false); |
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+ |
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regval = getreg32(RTC_MAGIC_REG); |
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if (regval != RTC_MAGIC) |
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{ |
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+ |
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stm32_pwr_enablebkp(true); |
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/* We might be changing RTCSEL - to ensure such changes work, we must
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