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220 lines
6.4 KiB
220 lines
6.4 KiB
/**************************************************************************** |
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* boards/arm/imxrt/imxrt1060-evk/scripts/flash-ocram.ld |
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* |
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* Copyright (C) 2018, 2020 Gregory Nutt. All rights reserved. |
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* Authors: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com> |
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* David Sidrane <david.sidrane@nscdg.com> |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* 3. Neither the name NuttX nor the names of its contributors may be |
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* used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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* |
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****************************************************************************/ |
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/* The FMURT1062 has 8MiB of QSPI FLASH beginning at address, |
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* 0x0060:0000, Upto 512Kb of DTCM RAM beginning at 0x2000:0000, and 1MiB OCRAM |
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* beginning at 0x2020:0000. Neither DTCM or SDRAM are used in this |
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* configuration. |
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* |
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* The default flexram setting on the iMXRT 1062 is |
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* 256Kib to OCRRAM, 128Kib ITCM and 128Kib DTCM. |
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* This can be changed by using a dcd by minipulating |
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* IOMUX GPR16 and GPR17. |
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* The configuartion we will use is 384Kib to OCRRAM, 0Kib ITCM and |
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* 128Kib DTCM. |
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* |
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* This is the OCRAM inker script. |
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* The NXP ROM bootloader will move the FLASH image to OCRAM. |
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* We must reserve 32K for the bootloader' OCRAM usage from the OCRAM Size |
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* and an additinal 8K for the ivt_s which is IVT_SIZE(8K) This 40K can be |
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* reused once the application is running. |
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* |
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* 0x2020:A000 to 0x202d:ffff - The application Image's vector table |
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* 0x2020:8000 to 0x2020:A000 - IVT |
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* 0x2020:0000 to 0x2020:7fff - NXP ROM bootloader. |
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* |
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* We artificially split the FLASH to allow locating sections that we do not |
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* want loaded inoto OCRAM. This is to save on OCRAM where the speen of the |
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* code does not matter. |
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* |
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*/ |
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MEMORY |
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{ |
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flash (rx) : ORIGIN = 0x60000000, LENGTH = 7M |
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flashxip (rx) : ORIGIN = 0x60700000, LENGTH = 1M |
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/* Vectors @ boot+ivt OCRAM2 Flex RAM Boot IVT */ |
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sram (rwx) : ORIGIN = 0x2020A000, LENGTH = 512K + 256K + 128K - (32K + 8K) |
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itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 0K |
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dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K |
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} |
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OUTPUT_ARCH(arm) |
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EXTERN(_vectors) |
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EXTERN(g_flash_config) |
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EXTERN(g_image_vector_table) |
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EXTERN(g_boot_data) |
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EXTERN(g_dcd_data) |
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ENTRY(_stext) |
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SECTIONS |
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{ |
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/* Image Vector Table and Boot Data for booting from external flash */ |
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.boot_hdr : ALIGN(4) |
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{ |
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FILL(0xff) |
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__boot_hdr_start__ = ABSOLUTE(.) ; |
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KEEP(*(.boot_hdr.conf)) |
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. = 0x1000 ; |
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KEEP(*(.boot_hdr.ivt)) |
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. = 0x1020 ; |
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KEEP(*(.boot_hdr.boot_data)) |
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. = 0x1030 ; |
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KEEP(*(.boot_hdr.dcd_data)) |
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__boot_hdr_end__ = ABSOLUTE(.) ; |
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. = 0x2000 ; |
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} > flash |
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/* Catch all the section we want not in OCRAM so that the *(.text .text.*) in flash does not */ |
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.flashxip : ALIGN(4) |
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{ |
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FILL(0xff) |
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/* Order matters */ |
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*(.text.__start) |
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*(.text.imxrt_ocram_initialize) |
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*(.slow_memory) |
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*(.text.*ModuleBase*) |
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*(.text.*print_message*) |
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*(.text._ZN4Ekf2C2Eb) |
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*(.text._ZN9CommanderC2Ev) |
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*(.text.*PreFlightCheck*) |
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*(.text.*calibrat*) |
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*(.text.*initEv) |
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*(.text.*probe*) |
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*(.text.*thread_main*); |
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*(.text.*listener*) |
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*(.text.nsh_*) |
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*(.text.lib_vscanf) |
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*(.text.*configure_streams_to_default*) |
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*(.text.*_main) |
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*(.rodata .rodata.*) |
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KEEP(*(__param*)) |
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*(.fixup) |
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*(.gnu.warning) |
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*(.gnu.linkonce.t.*) |
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*(.glue_7) |
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*(.glue_7t) |
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*(.got) |
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*(.gcc_except_table) |
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*(.gnu.linkonce.r.*) |
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} > flashxip |
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/* Sections that will go to OCRAM */ |
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.text : |
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{ |
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_stext = ABSOLUTE(.); |
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*(.vectors) |
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*(.text .text.*) |
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_etext = ABSOLUTE(.); |
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} > sram AT> flash |
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/* |
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* Init functions (static constructors and the like) |
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*/ |
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.init_section : |
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{ |
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_sinit = ABSOLUTE(.); |
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KEEP(*(.init_array .init_array.*)) |
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_einit = ABSOLUTE(.); |
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} > flash |
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.ARM.extab : |
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{ |
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*(.ARM.extab*) |
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} > flash |
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__exidx_start = ABSOLUTE(.); |
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.ARM.exidx : |
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{ |
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*(.ARM.exidx*) |
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__exidx_end = ABSOLUTE(.); |
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} > flash |
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_eronly = ABSOLUTE(.); |
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.data : |
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{ |
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_sdata = ABSOLUTE(.); |
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*(.data .data.*) |
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*(.gnu.linkonce.d.*) |
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CONSTRUCTORS |
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. = ALIGN(4); |
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_edata = ABSOLUTE(.); |
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} > sram AT > flash |
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.ramfunc ALIGN(4): |
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{ |
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_sramfuncs = ABSOLUTE(.); |
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*(.ramfunc .ramfunc.*) |
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_eramfuncs = ABSOLUTE(.); |
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} > sram AT > flash |
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_framfuncs = LOADADDR(.ramfunc); |
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.bss : |
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{ |
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_sbss = ABSOLUTE(.); |
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*(.bss .bss.*) |
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*(.gnu.linkonce.b.*) |
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*(COMMON) |
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. = ALIGN(4); |
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_ebss = ABSOLUTE(.); |
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} > sram |
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/* Stabs debugging sections. */ |
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.stab 0 : { *(.stab) } |
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.stabstr 0 : { *(.stabstr) } |
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.stab.excl 0 : { *(.stab.excl) } |
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.stab.exclstr 0 : { *(.stab.exclstr) } |
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.stab.index 0 : { *(.stab.index) } |
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.stab.indexstr 0 : { *(.stab.indexstr) } |
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.comment 0 : { *(.comment) } |
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.debug_abbrev 0 : { *(.debug_abbrev) } |
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.debug_info 0 : { *(.debug_info) } |
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.debug_line 0 : { *(.debug_line) } |
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.debug_pubnames 0 : { *(.debug_pubnames) } |
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.debug_aranges 0 : { *(.debug_aranges) } |
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}
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