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147 lines
5.3 KiB
147 lines
5.3 KiB
/************************************************************************************ |
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* configs/px4io/include/board.h |
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* include/arch/board/board.h |
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* |
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* Copyright (C) 2009 Gregory Nutt. All rights reserved. |
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* Author: Gregory Nutt <gnutt@nuttx.org> |
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* Copyright (C) 2012 PX4 Development Team. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* 3. Neither the name NuttX nor the names of its contributors may be |
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* used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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* |
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************************************************************************************/ |
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#ifndef __ARCH_BOARD_BOARD_H |
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#define __ARCH_BOARD_BOARD_H |
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/************************************************************************************ |
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* Included Files |
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************************************************************************************/ |
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#include <nuttx/config.h> |
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#ifndef __ASSEMBLY__ |
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# include <stdint.h> |
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#endif |
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#include <stm32.h> |
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/************************************************************************************ |
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* Definitions |
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************************************************************************************/ |
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/* Clocking *************************************************************************/ |
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/* On-board crystal frequency is 24MHz (HSE) */ |
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#define STM32_BOARD_XTAL 24000000ul |
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/* Use the HSE output as the system clock */ |
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#define STM32_SYSCLK_SW RCC_CFGR_SW_HSE |
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#define STM32_SYSCLK_SWS RCC_CFGR_SWS_HSE |
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#define STM32_SYSCLK_FREQUENCY STM32_BOARD_XTAL |
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/* AHB clock (HCLK) is SYSCLK (24MHz) */ |
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#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK |
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#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY |
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#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ |
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/* APB2 clock (PCLK2) is HCLK (24MHz) */ |
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK |
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#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY |
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#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-4 */ |
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/* APB2 timer 1 will receive PCLK2. */ |
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#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) |
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#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) |
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/* APB1 clock (PCLK1) is HCLK (24MHz) */ |
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#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK |
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#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY) |
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/* All timers run off PCLK */ |
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#define STM32_APB1_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) |
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#define STM32_APB1_TIM2_CLKIN (STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM3_CLKIN (STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM4_CLKIN (STM32_PCLK1_FREQUENCY) |
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/* |
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* Some of the USART pins are not available; override the GPIO |
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* definitions with an invalid pin configuration. |
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*/ |
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#undef GPIO_USART2_CTS |
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#define GPIO_USART2_CTS 0xffffffff |
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#undef GPIO_USART2_RTS |
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#define GPIO_USART2_RTS 0xffffffff |
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#undef GPIO_USART2_CK |
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#define GPIO_USART2_CK 0xffffffff |
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#undef GPIO_USART3_CK |
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#define GPIO_USART3_CK 0xffffffff |
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#undef GPIO_USART3_CTS |
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#define GPIO_USART3_CTS 0xffffffff |
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#undef GPIO_USART3_RTS |
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#define GPIO_USART3_RTS 0xffffffff |
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/************************************************************************************ |
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* Public Data |
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************************************************************************************/ |
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#ifndef __ASSEMBLY__ |
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#undef EXTERN |
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#if defined(__cplusplus) |
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#define EXTERN extern "C" |
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extern "C" { |
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#else |
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#define EXTERN extern |
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#endif |
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/************************************************************************************ |
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* Public Function Prototypes |
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************************************************************************************/ |
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/************************************************************************************ |
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* Name: stm32_boardinitialize |
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* |
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* Description: |
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* All STM32 architectures must provide the following entry point. This entry point |
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* is called early in the intitialization -- after all memory has been configured |
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* and mapped but before any devices have been initialized. |
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* |
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************************************************************************************/ |
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EXTERN void stm32_boardinitialize(void); |
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#if defined(__cplusplus) |
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} |
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#endif |
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#endif /* __ASSEMBLY__ */ |
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#endif /* __ARCH_BOARD_BOARD_H */
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