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426 lines
16 KiB
426 lines
16 KiB
/************************************************************************************ |
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* configs/cloudctrl/include/board.h |
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* |
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* Copyright (C) 2012 Gregory Nutt. All rights reserved. |
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* Author: Gregory Nutt <gnutt@nuttx.org> |
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* Darcy Gong <darcy.gong@gmail.com> |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* 3. Neither the name NuttX nor the names of its contributors may be |
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* used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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* |
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************************************************************************************/ |
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#ifndef __CONFIGS_CLOUDCTRL_INCLUDE_BOARD_H |
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#define __CONFIGS_CLOUDCTRL_INCLUDE_BOARD_H 1 |
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/************************************************************************************ |
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* Included Files |
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************************************************************************************/ |
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#include <nuttx/config.h> |
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#ifndef __ASSEMBLY__ |
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# include <stdint.h> |
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#endif |
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#include "stm32_rcc.h" |
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#include "stm32_sdio.h" |
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#include "stm32_internal.h" |
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#include <nuttx/arch.h> |
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/************************************************************************************ |
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* Pre-processor Definitions |
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************************************************************************************/ |
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/* Clocking *************************************************************************/ |
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/* HSI - 8 MHz RC factory-trimmed |
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* LSI - 40 KHz RC (30-60KHz, uncalibrated) |
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* HSE - On-board crystal frequency is 25MHz |
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* LSE - 32.768 kHz |
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*/ |
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#define STM32_BOARD_XTAL 25000000ul |
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#define STM32_HSI_FREQUENCY 8000000ul |
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#define STM32_LSI_FREQUENCY 40000 |
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL |
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#define STM32_LSE_FREQUENCY 32768 |
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/* PLL ouput is 72MHz */ |
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#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */ |
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#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */ |
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#define STM32_PLL_PREDIV1 RCC_CFGR2_PREDIV1d5 /* 40MHz / 5 => 8MHz */ |
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#define STM32_PLL_PLLMUL RCC_CFGR_PLLMUL_CLKx9 /* 8MHz * 9 => 72Mhz */ |
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#define STM32_PLL_FREQUENCY (72000000) |
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/* SYCLLK and HCLK are the PLL frequency */ |
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#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY |
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#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY |
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#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ |
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/* APB2 clock (PCLK2) is HCLK (72MHz) */ |
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK |
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#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY |
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#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ |
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/* APB2 timers 1 and 8 will receive PCLK2. */ |
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#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) |
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#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) |
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/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ |
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#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 |
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#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) |
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/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ |
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#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) |
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#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) |
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/* MCO output driven by PLL3. From above, we already have PLL3 input frequency as: |
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* |
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* STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz |
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*/ |
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#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO) |
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# define BOARD_CFGR_MCO_SOURCE RCC_CFGR_PLL3CLK /* Source: PLL3 */ |
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# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */ |
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#endif |
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/* LED definitions ******************************************************************/ |
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/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any |
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* way. The following definitions are used to access individual LEDs. |
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*/ |
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/* LED index values for use with stm32_setled() */ |
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#define BOARD_LED1 0 |
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#define BOARD_LED2 1 |
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#define BOARD_LED3 2 |
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#define BOARD_LED4 3 |
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#define BOARD_NLEDS 4 |
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/* LED bits for use with stm32_setleds() */ |
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#define BOARD_LED1_BIT (1 << BOARD_LED1) |
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#define BOARD_LED2_BIT (1 << BOARD_LED2) |
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#define BOARD_LED3_BIT (1 << BOARD_LED3) |
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#define BOARD_LED4_BIT (1 << BOARD_LED4) |
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the |
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* STM3240G-EVAL. The following definitions describe how NuttX controls the LEDs: |
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*/ |
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#define LED_STARTED 0 /* LED1 */ |
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#define LED_HEAPALLOCATE 1 /* LED2 */ |
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#define LED_IRQSENABLED 2 /* LED1 + LED2 */ |
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#define LED_STACKCREATED 3 /* LED3 */ |
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#define LED_INIRQ 4 /* LED1 + LED3 */ |
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#define LED_SIGNAL 5 /* LED2 + LED3 */ |
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#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ |
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#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ |
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/* Button definitions ***************************************************************/ |
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/* The STM3240G-EVAL supports three buttons: */ |
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#define BUTTON_KEY1 0 /* Name printed on board */ |
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#define BUTTON_KEY2 1 |
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#define BUTTON_KEY3 2 |
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#define NUM_BUTTONS 3 |
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#define BUTTON_USERKEY BUTTON_KEY1 /* Names in schematic */ |
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#define BUTTON_TAMPER BUTTON_KEY2 |
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#define BUTTON_WAKEUP BUTTON_KEY3 |
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#define BUTTON_KEY1_BIT (1 << BUTTON_KEY1) |
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#define BUTTON_KEY2_BIT (1 << BUTTON_KEY2) |
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#define BUTTON_KEY3_BIT (1 << BUTTON_KEY3) |
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#define BUTTON_USERKEY_BIT BUTTON_KEY1_BIT |
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#define BUTTON_TAMPER_BIT BUTTON_KEY2_BIT |
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#define BUTTON_WAKEUP_BIT BUTTON_KEY3_BIT |
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/* Relays */ |
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#define NUM_RELAYS 2 |
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/* Pin selections ******************************************************************/ |
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/* Ethernet |
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* |
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* -- ---- -------------- ---------------------------------------------------------- |
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* PN NAME SIGNAL NOTES |
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* -- ---- -------------- ---------------------------------------------------------- |
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* 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of these |
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* RMII_REF_CLK Ethernet PHY signals, the DM916AEP is actually configured |
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* 25 PA2 MII_MDIO Ethernet PHY to work in RMII mode. |
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* 48 PB11 MII_TX_EN Ethernet PHY |
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* 51 PB12 MII_TXD0 Ethernet PHY |
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* 52 PB13 MII_TXD1 Ethernet PHY |
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* 16 PC1 MII_MDC Ethernet PHY |
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* 34 PC5 MII_INT Ethernet PHY |
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* 55 PD8 MII_RX_DV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP |
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* 55 PD8 RMII_CRSDV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP |
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* 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP |
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* 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP |
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* |
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* The board desdign can support a 50MHz external clock to drive the PHY |
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* (U9). However, on my board, U9 is not present. |
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* |
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* 67 PA8 MCO DM9161AEP |
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*/ |
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#ifdef CONFIG_STM32_ETHMAC |
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# ifndef CONFIG_STM32_ETH_REMAP |
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# error "STM32 Ethernet requires CONFIG_STM32_ETH_REMAP" |
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# endif |
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# ifndef CONFIG_STM32_RMII |
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# error "STM32 Ethernet requires CONFIG_STM32_RMII" |
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# endif |
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# ifndef CONFIG_STM32_RMII_MCO |
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# error "STM32 Ethernet requires CONFIG_STM32_RMII_MCO" |
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# endif |
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#endif |
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/* USB |
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* |
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* -- ---- -------------- ---------------------------------------------------------- |
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* PN NAME SIGNAL NOTES |
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* -- ---- -------------- ---------------------------------------------------------- |
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* 68 PA9 USB_VBUS MINI-USB-AB. JP3 |
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* 69 PA10 USB_ID MINI-USB-AB. JP5 |
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* 70 PA11 USB_DM MINI-USB-AB |
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* 71 PA12 USB_DP MINI-USB-AB |
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* 95 PB8 USB_PWR Drives USB VBUS |
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*/ |
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/* UARTS/USARTS |
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* |
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* -- ---- -------------- ---------------------------------------------------------- |
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* PN NAME SIGNAL NOTES |
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* -- ---- -------------- ---------------------------------------------------------- |
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* 68 PA9 USART1_TX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP |
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* 69 PA10 USART1_RX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP |
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* 86 PD5 USART2_TX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP |
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* 87 PD6 USART2_RX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP |
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* 86 PD5 485_TX Same as USART2_TX but goes to SP3485 |
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* 87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4) |
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*/ |
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#if defined(CONFIG_STM32_USART1) && !defined(CONFIG_STM32_USART1_REMAP) |
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# error "CONFIG_STM32_USART1 requires CONFIG_STM32_USART1_REMAP" |
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#endif |
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#if defined(CONFIG_STM32_USART2) && !defined(CONFIG_STM32_USART2_REMAP) |
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# error "CONFIG_STM32_USART2 requires CONFIG_STM32_USART2_REMAP" |
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#endif |
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/* SPI |
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* |
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* -- ---- -------------- ---------------------------------------------------------- |
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* PN NAME SIGNAL NOTES |
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* -- ---- -------------- ---------------------------------------------------------- |
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* 30 PA5 SPI1_SCK To the SD card, SPI FLASH. |
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* Requires !CONFIG_STM32_SPI1_REMAP |
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* 31 PA6 SPI1_MISO To the SD card, SPI FLASH. |
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* Requires !CONFIG_STM32_SPI1_REMAP |
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* 32 PA7 SPI1_MOSI To the SD card, SPI FLASH. |
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* Requires !CONFIG_STM32_SPI1_REMAP |
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* 78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module. |
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* Requires CONFIG_STM32_SPI3_REMAP. |
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* 79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module. |
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* Requires CONFIG_STM32_SPI3_REMAP. |
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* 80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module. |
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* Requires CONFIG_STM32_SPI3_REMAP. |
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*/ |
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#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP) |
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# error "CONFIG_STM32_SPI1 must not have CONFIG_STM32_SPI1_REMAP" |
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#endif |
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#if defined(CONFIG_STM32_SPI3) && !defined(CONFIG_STM32_SPI3_REMAP) |
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# error "CONFIG_STM32_SPI3 requires CONFIG_STM32_SPI3_REMAP" |
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#endif |
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/* DAC |
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* |
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* -- ---- -------------- ---------------------------------------------------------- |
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* PN NAME SIGNAL NOTES |
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* -- ---- -------------- ---------------------------------------------------------- |
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* 29 PA4 DAC_OUT1 To CON5(CN14) |
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* 30 PA5 DAC_OUT2 To CON5(CN14). JP10 |
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*/ |
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/* ADC |
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* |
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* -- ---- -------------- ---------------------------------------------------------- |
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* PN NAME SIGNAL NOTES |
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* -- ---- -------------- ---------------------------------------------------------- |
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* 35 PB0 ADC_IN1 GPIO_ADC12_IN8. To CON5(CN14) |
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* 36 PB1 ADC_IN2 GPIO_ADC12_IN9. To CON5(CN14) |
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* 15 PC0 POTENTIO_METER GPIO_ADC12_IN10 |
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*/ |
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/************************************************************************************ |
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* Public Data |
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************************************************************************************/ |
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#ifndef __ASSEMBLY__ |
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#undef EXTERN |
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#if defined(__cplusplus) |
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#define EXTERN extern "C" |
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extern "C" { |
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#else |
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#define EXTERN extern |
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#endif |
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/************************************************************************************ |
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* Public Function Prototypes |
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************************************************************************************/ |
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/************************************************************************************ |
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* Name: stm32_boardinitialize |
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* |
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* Description: |
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* All STM32 architectures must provide the following entry point. This entry point |
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* is called early in the intitialization -- after all memory has been configured |
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* and mapped but before any devices have been initialized. |
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* |
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************************************************************************************/ |
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void stm32_boardinitialize(void); |
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/************************************************************************************ |
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* Button support. |
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* |
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* Description: |
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* up_buttoninit() must be called to initialize button resources. After |
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* that, up_buttons() may be called to collect the current state of all |
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* buttons or up_irqbutton() may be called to register button interrupt |
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* handlers. |
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* |
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* After up_buttoninit() has been called, up_buttons() may be called to |
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* collect the state of all buttons. up_buttons() returns an 8-bit bit set |
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* with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT |
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* definitions in board.h for the meaning of each bit. |
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* |
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* up_irqbutton() may be called to register an interrupt handler that will |
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* be called when a button is depressed or released. The ID value is a |
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* button enumeration value that uniquely identifies a button resource. See the |
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* BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration |
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* value. The previous interrupt handler address is returned (so that it may |
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* restored, if so desired). |
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* |
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************************************************************************************/ |
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#ifdef CONFIG_ARCH_BUTTONS |
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EXTERN void up_buttoninit(void); |
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EXTERN uint8_t up_buttons(void); |
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#ifdef CONFIG_ARCH_IRQBUTTONS |
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EXTERN xcpt_t up_irqbutton(int id, xcpt_t irqhandler); |
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#endif |
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#endif |
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/************************************************************************************ |
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* Name: stm32_ledinit, stm32_setled, and stm32_setleds |
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* |
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* Description: |
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* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board LEDs. If |
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* CONFIG_ARCH_LEDS is not defined, then the following interfacesare available to |
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* control the LEDs from user applications. |
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* |
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************************************************************************************/ |
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#ifndef CONFIG_ARCH_LEDS |
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EXTERN void stm32_ledinit(void); |
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EXTERN void stm32_setled(int led, bool ledon); |
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EXTERN void stm32_setleds(uint8_t ledset); |
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#endif |
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/************************************************************************************ |
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* Name: stm32_lcdclear |
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* |
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* Description: |
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* This is a non-standard LCD interface just for the Shenzhou board. Because |
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* of the various rotations, clearing the display in the normal way by writing a |
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* sequences of runs that covers the entire display can be very slow. Here the |
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* display is cleared by simply setting all GRAM memory to the specified color. |
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* |
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************************************************************************************/ |
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EXTERN void stm32_lcdclear(uint16_t color); |
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/************************************************************************************ |
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* Relay control functions |
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* |
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* Description: |
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* Non-standard functions for relay control from the Shenzhou board. |
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* |
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* NOTE: These must match the prototypes in include/nuttx/arch.h |
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* |
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************************************************************************************/ |
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#ifdef CONFIG_ARCH_RELAYS |
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EXTERN void up_relaysinit(void); |
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EXTERN void relays_setstat(int relays, bool stat); |
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EXTERN bool relays_getstat(int relays); |
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EXTERN void relays_setstats(uint32_t relays_stat); |
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EXTERN uint32_t relays_getstats(void); |
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EXTERN void relays_onoff(int relays, uint32_t mdelay); |
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EXTERN void relays_onoffs(uint32_t relays_stat, uint32_t mdelay); |
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EXTERN void relays_resetmode(int relays); |
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EXTERN void relays_powermode(int relays); |
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EXTERN void relays_resetmodes(uint32_t relays_stat); |
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EXTERN void relays_powermodes(uint32_t relays_stat); |
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#endif |
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/************************************************************************************ |
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* Chip ID functions |
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* |
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* Description: |
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* Non-standard functions to obtain chip ID information. |
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* |
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************************************************************************************/ |
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EXTERN const char *stm32_getchipid(void); |
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EXTERN const char *stm32_getchipid_string(void); |
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#undef EXTERN |
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#if defined(__cplusplus) |
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} |
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#endif |
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#endif /* __ASSEMBLY__ */ |
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#endif /* __CONFIGS_CLOUDCTRL_INCLUDE_BOARD_H */
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