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167 lines
5.7 KiB
167 lines
5.7 KiB
/**************************************************************************** |
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* arch/arm/src/stm32h7/stm32_qspi.h |
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* |
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* Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. |
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* Author: dev@ziggurat29.com |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* 3. Neither the name NuttX nor the names of its contributors may be |
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* used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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* |
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****************************************************************************/ |
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#ifndef __ARCH_ARM_SRC_STM32_STM32H7_QSPI_H |
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#define __ARCH_ARM_SRC_STM32_STM32H7_QSPI_H |
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/**************************************************************************** |
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* Included Files |
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****************************************************************************/ |
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#include <nuttx/config.h> |
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#include <nuttx/spi/qspi.h> |
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#include <inttypes.h> |
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#include <stdint.h> |
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#include <stdbool.h> |
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#include "chip.h" |
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#ifdef CONFIG_STM32H7_QUADSPI |
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/**************************************************************************** |
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* Pre-processor Definitions |
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****************************************************************************/ |
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/**************************************************************************** |
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* Public Types |
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****************************************************************************/ |
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/**************************************************************************** |
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* Inline Functions |
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****************************************************************************/ |
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#ifndef __ASSEMBLY__ |
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/**************************************************************************** |
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* Public Data |
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****************************************************************************/ |
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#undef EXTERN |
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#if defined(__cplusplus) |
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#define EXTERN extern "C" |
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extern "C" |
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{ |
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#else |
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#define EXTERN extern |
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#endif |
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#define CONFIG_STM32H7_QUADSPI_USE_RAMFUNC |
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#ifdef CONFIG_STM32H7_QUADSPI_USE_RAMFUNC |
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#define QUADSPI_RAMFUNC __ramfunc__ |
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#else |
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#define QUADSPI_RAMFUNC |
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#endif |
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/**************************************************************************** |
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* Public Function Prototypes |
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****************************************************************************/ |
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/* QSPI methods */ |
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QUADSPI_RAMFUNC int qspi_lock(struct qspi_dev_s *dev, bool lock); |
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QUADSPI_RAMFUNC uint32_t qspi_setfrequency(struct qspi_dev_s *dev, |
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uint32_t frequency); |
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QUADSPI_RAMFUNC void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode); |
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QUADSPI_RAMFUNC void qspi_setbits(struct qspi_dev_s *dev, int nbits); |
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QUADSPI_RAMFUNC int qspi_command(struct qspi_dev_s *dev, |
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struct qspi_cmdinfo_s *cmdinfo); |
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QUADSPI_RAMFUNC int qspi_memory(struct qspi_dev_s *dev, |
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struct qspi_meminfo_s *meminfo); |
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QUADSPI_RAMFUNC FAR void *qspi_alloc(FAR struct qspi_dev_s *dev, size_t buflen); |
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QUADSPI_RAMFUNC void qspi_free(FAR struct qspi_dev_s *dev, FAR void *buffer); |
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/**************************************************************************** |
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* Name: stm32l4_qspi_initialize |
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* |
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* Description: |
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* Initialize the selected QSPI port in master mode |
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* |
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* Input Parameters: |
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* intf - Interface number(must be zero) |
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* |
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* Returned Value: |
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* Valid SPI device structure reference on success; a NULL on failure |
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* |
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****************************************************************************/ |
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struct qspi_dev_s; |
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FAR struct qspi_dev_s *stm32h7_qspi_initialize(int intf); |
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/**************************************************************************** |
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* Name: stm32l4_qspi_enter_memorymapped |
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* |
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* Description: |
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* Put the QSPI device into memory mapped mode |
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* |
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* Input Parameters: |
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* dev - QSPI device |
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* meminfo - parameters like for a memory transfer used for reading |
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* lpto - number of cycles to wait to automatically de-assert CS |
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* |
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* Returned Value: |
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* None |
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* |
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****************************************************************************/ |
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QUADSPI_RAMFUNC void stm32h7_qspi_enter_memorymapped(struct qspi_dev_s *dev, |
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const struct qspi_meminfo_s *meminfo, |
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uint32_t lpto); |
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/**************************************************************************** |
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* Name: stm32l4_qspi_exit_memorymapped |
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* |
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* Description: |
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* Take the QSPI device out of memory mapped mode |
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* |
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* Input Parameters: |
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* dev - QSPI device |
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* |
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* Returned Value: |
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* None |
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* |
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****************************************************************************/ |
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QUADSPI_RAMFUNC void stm32h7_qspi_exit_memorymapped(struct qspi_dev_s *dev); |
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#undef EXTERN |
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#if defined(__cplusplus) |
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} |
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#endif |
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#endif /* __ASSEMBLY__ */ |
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#endif /* CONFIG_STM32H7_QSPI */ |
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#endif /* __ARCH_ARM_SRC_STM32_STM32H7_QSPI_H */
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