HAL_ChibiOS: fixed build of iomcu firmware

libraries/AP_HAL_ChibiOS/HAL_ChibiOS_Class.cpp

@@ -233,8 +233,8 @@ static void main_loop()
                                    pd.fault_thd_prio,
                                    pd.fault_icsr);
     }
-#endif
-#endif
+#endif // HAL_NO_LOGGING
+#endif // IOMCU_FW
 
     schedulerInstance.watchdog_pat();
 

libraries/AP_HAL_ChibiOS/hwdef/common/stm32f1_mcuconf.h

@@ -43,30 +43,22 @@
 #define STM32_PPRE1                         STM32_PPRE1_DIV2
 #define STM32_PPRE2                         STM32_PPRE2_DIV2
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#elif STM32_HSECLK == 24000000U
+#define STM32_SW                            STM32_SW_HSE
+#define STM32_PLLSRC                        STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE                  9
+#define STM32_PPRE1                         STM32_PPRE1_DIV1
+#define STM32_PPRE2                         STM32_PPRE2_DIV1
+#define STM32_ADCPRE                        STM32_ADCPRE_DIV2
 #else
 #error "Unsupported STM32F1xx clock frequency"
 #endif
 
-#ifndef STM32_SW
-#define STM32_SW                            STM32_SW_HSE
-#endif
-
 #ifndef STM32_HPRE
 #define STM32_HPRE                          STM32_HPRE_DIV1
 #endif
 
-#ifndef STM32_PPRE1
-#define STM32_PPRE1                         STM32_PPRE1_DIV1
-#endif
-
-#ifndef STM32_PPRE2
-#define STM32_PPRE2                         STM32_PPRE2_DIV1
-#endif
-
-#ifndef STM32_ADCPRE
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV2
-#endif
-
 #define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
 #define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
 #define STM32_PVD_ENABLE                    FALSE