2 changed files with 157 additions and 146 deletions
@ -1,146 +0,0 @@
@@ -1,146 +0,0 @@
|
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#!/usr/bin/env python |
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''' |
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decode an stm32 ICSR register value |
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''' |
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import sys |
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import optparse |
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def num(s): |
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try: |
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return int(s) |
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except ValueError: |
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return int(s, 16) |
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parser = optparse.OptionParser(__file__) |
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opts, args = parser.parse_args() |
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if len(args) == 0: |
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print(parser.usage) |
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sys.exit(0) |
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ICSR = num(args[0]) |
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# https://www.st.com/content/ccc/resource/technical/document/programming_manual/6c/3a/cb/e7/e4/ea/44/9b/DM00046982.pdf/files/DM00046982.pdf/jcr:content/translations/en.DM00046982.pdf |
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# page 225 |
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def decoder_m4_vectactive(value): |
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exceptions = { |
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0: "Thread mode", |
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1: "Reserved", |
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2: "NMI", |
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3: "Hard fault", |
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4: "Memory management fault", |
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5: "Bus fault", |
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6: "Usage fault", |
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7: "Reserved....", |
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10: "Reserved", |
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11: "SVCall", |
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12: "Reserved for Debug", |
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13: "Reserved", |
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14: "PendSV", |
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15: "SysTick", |
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} |
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if value in exceptions: |
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exception = "%s" % str(exceptions[value]) |
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else: |
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exception = "IRQ%u" % (value - 16) |
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sys.stdout.write(" (%s)" % exception) |
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def decoder_m4_retobase(value): |
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if value: |
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out = "no (or no more) active exceptions" |
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else: |
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out = "preempted active exceptions" |
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sys.stdout.write(" (%s)" % out) |
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def decoder_m4_vectpending(value): |
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return decoder_m4_vectactive(value) |
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def decoder_m4_isrpending(value): |
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if value: |
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out = "Interrupt pending" |
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else: |
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out = "No pending interupt" |
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sys.stdout.write(" (%s)" % out) |
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def decoder_m4_pendstclr(value): |
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sys.stdout.write(" (WO clears SysTick exception)") |
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def decoder_m4_pendstset(value): |
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if value: |
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out = "SysTick pending" |
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else: |
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out = "SysTick not pending" |
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sys.stdout.write(" (%s)" % out) |
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def decoder_m4_pendsvclr(value): |
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sys.stdout.write(" (WO clears pendsv exception)") |
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def decoder_m4_pendsvset(value): |
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if value: |
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out = "PendSV pending" |
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else: |
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out = "PendSV not pending" |
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sys.stdout.write(" (%s)" % out) |
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def decoder_m4_nmipendset(value): |
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if value: |
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out = "NMI pending" |
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else: |
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out = "NMI not pending" |
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sys.stdout.write(" (%s)" % out) |
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# this ICSR-bit-assignment-table table also looks valid for M7 - page 195 of dm00237416-stm32f7-series-and-stm32h7-series-cortexm7-processor-programming-manual-stmicroelectronics.pdf |
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M4_BITS = [ |
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("0-8", "VECTACTIVE", decoder_m4_vectactive), |
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("9-10", "RESERVED1", None), |
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("11", "RETOBASE", decoder_m4_retobase), |
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("12-18", "VECTPENDING", decoder_m4_vectpending), |
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("19-21", "RESERVED2", None), |
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("22", "ISRPENDING", decoder_m4_isrpending), |
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("23-24", "RESERVED3", None), |
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("25", "PENDSTCLR", decoder_m4_pendstclr), |
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("26", "PENDSTSET", decoder_m4_pendstset), |
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("27", "PENDSVCLR", decoder_m4_pendsvclr), |
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("28", "PENDSVSET", decoder_m4_pendstset), |
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("29-30", "RESERVED4", None), |
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("31", "NMIPENDSET", decoder_m4_nmipendset), |
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] |
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longest_name_length = 0 |
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for bit in M4_BITS: |
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(bits, name, decoder) = bit |
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length = len(name) |
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if length > longest_name_length: |
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longest_name_length = length |
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complete_mask = 0 |
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for bit in M4_BITS: |
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(bits, name, decoder) = bit |
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if "-" in bits: |
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(start_bit, stop_bit) = bits.split("-") |
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start_bit = int(start_bit) |
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stop_bit = int(stop_bit) |
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else: |
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start_bit = int(bits) |
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stop_bit = int(bits) |
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mask = 0 |
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for i in range(start_bit, stop_bit+1): |
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mask |= (1 << i) |
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complete_mask |= mask |
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value = (ICSR & mask) >> start_bit |
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_format = "%%%us: %%3u " % (longest_name_length,) |
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sys.stdout.write(_format % (name, value)), |
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if decoder is not None: |
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decoder(value) |
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print("") |
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if complete_mask != 0b11111111111111111111111111111111: |
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raise Exception("Mask incomplete") |
@ -0,0 +1,157 @@
@@ -0,0 +1,157 @@
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#!/usr/bin/env python |
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''' |
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decode an stm32 ICSR register value |
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''' |
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import sys |
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import optparse |
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class DecodeICSR(object): |
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# https://www.st.com/content/ccc/resource/technical/document/programming_manual/6c/3a/cb/e7/e4/ea/44/9b/DM00046982.pdf/files/DM00046982.pdf/jcr:content/translations/en.DM00046982.pdf |
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# page 225 |
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def __init__(self): |
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# this ICSR-bit-assignment-table table also looks valid for M7 - page 195 of dm00237416-stm32f7-series-and-stm32h7-series-cortexm7-processor-programming-manual-stmicroelectronics.pdf |
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self.M4_BITS = [ |
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("0-8", "VECTACTIVE", self.decoder_m4_vectactive), |
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("9-10", "RESERVED1", None), |
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("11", "RETOBASE", self.decoder_m4_retobase), |
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("12-18", "VECTPENDING", self.decoder_m4_vectpending), |
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("19-21", "RESERVED2", None), |
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("22", "ISRPENDING", self.decoder_m4_isrpending), |
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("23-24", "RESERVED3", None), |
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("25", "PENDSTCLR", self.decoder_m4_pendstclr), |
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("26", "PENDSTSET", self.decoder_m4_pendstset), |
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("27", "PENDSVCLR", self.decoder_m4_pendsvclr), |
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("28", "PENDSVSET", self.decoder_m4_pendstset), |
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("29-30", "RESERVED4", None), |
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("31", "NMIPENDSET", self.decoder_m4_nmipendset), |
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] |
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self.longest_name_length = 0 |
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for bit in self.M4_BITS: |
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(bits, name, decoder) = bit |
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length = len(name) |
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if length > self.longest_name_length: |
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self.longest_name_length = length |
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def decoder_m4_vectactive(self, value): |
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exceptions = { |
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0: "Thread mode", |
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1: "Reserved", |
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2: "NMI", |
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3: "Hard fault", |
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4: "Memory management fault", |
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5: "Bus fault", |
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6: "Usage fault", |
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7: "Reserved....", |
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10: "Reserved", |
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11: "SVCall", |
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12: "Reserved for Debug", |
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13: "Reserved", |
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14: "PendSV", |
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15: "SysTick", |
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} |
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if value in exceptions: |
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exception = "%s" % str(exceptions[value]) |
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else: |
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exception = "IRQ%u" % (value - 16) |
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return " (%s)" % exception |
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def decoder_m4_retobase(self, value): |
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if value: |
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out = "no (or no more) active exceptions" |
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else: |
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out = "preempted active exceptions" |
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return (" (%s)" % out) |
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def decoder_m4_vectpending(self, value): |
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return self.decoder_m4_vectactive(value) |
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def decoder_m4_isrpending(self, value): |
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if value: |
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out = "Interrupt pending" |
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else: |
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out = "No pending interupt" |
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return (" (%s)" % out) |
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def decoder_m4_pendstclr(self, value): |
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return (" (WO clears SysTick exception)") |
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def decoder_m4_pendstset(self, value): |
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if value: |
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out = "SysTick pending" |
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else: |
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out = "SysTick not pending" |
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return (" (%s)" % out) |
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def decoder_m4_pendsvclr(self, value): |
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return (" (WO clears pendsv exception)") |
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def decoder_m4_pendsvset(self, value): |
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if value: |
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out = "PendSV pending" |
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else: |
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out = "PendSV not pending" |
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return (" (%s)" % out) |
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def decoder_m4_nmipendset(self, value): |
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if value: |
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out = "NMI pending" |
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else: |
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out = "NMI not pending" |
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return (" (%s)" % out) |
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def string(self, ICSR): |
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ret = "" |
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complete_mask = 0 |
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for bit in self.M4_BITS: |
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(bits, name, decoder) = bit |
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if "-" in bits: |
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(start_bit, stop_bit) = bits.split("-") |
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start_bit = int(start_bit) |
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stop_bit = int(stop_bit) |
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else: |
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start_bit = int(bits) |
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stop_bit = int(bits) |
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mask = 0 |
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for i in range(start_bit, stop_bit+1): |
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mask |= (1 << i) |
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complete_mask |= mask |
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value = (ICSR & mask) >> start_bit |
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_format = "%%%us: %%3u " % (self.longest_name_length,) |
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ret += (_format % (name, value)) |
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if decoder is not None: |
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ret += decoder(value) |
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ret += "\n" |
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return ret |
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if complete_mask != 0b11111111111111111111111111111111: |
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raise Exception("Mask incomplete") |
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def run(self, ICSR): |
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sys.stdout.write(self.string(ICSR)) |
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if __name__ == '__main__': |
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parser = optparse.OptionParser(__file__) |
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opts, args = parser.parse_args() |
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if len(args) == 0: |
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print(parser.usage) |
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sys.exit(0) |
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|
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def num(s): |
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try: |
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return int(s) |
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except ValueError: |
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return int(s, 16) |
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ICSR = num(args[0]) |
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decoder = DecodeICSR() |
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decoder.run(ICSR) |
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