Tree: 2a1a105462

c415-sdk

celiu-4.0

celiu-4.0.17-rc8

master

mission-4.1.18

zr-sdk-4.1.16

zr-sdk-4.3.1

zr-v4.1.17

zr-v5.0

zr-v5.1

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Commit Graph

1 Commits (2a1a1054620a3cb55d0c0724c745e98bc85f59ca)

Author	SHA1	Message	Date
Andrew Tridgell	40e3b422b5	HAL_SITL: rename HAL_AVR_SITL to HAL_SITL ... it is nothing to do with the original AVR emulation now	10 years ago
Andrew Tridgell	9748cb1e3e	HAL_SITL: use a synthetic clock when possible ... this decouples wall clock time from simulation time if the FDM supports it	10 years ago
Pat Hickey	7b5153c79b	AP_HAL_AVR_SITL: main calls system_initialized	12 years ago
Andrew Tridgell	7be507948f	SITL: added SITL_State::loop_hook() ... this prevents us using so much CPU time, and ensures stdout is flushed	12 years ago
Pat Hickey	63eb1dc85d	AP_HAL_AVR_SITL: separate header for AP_HAL_MAIN and Private	12 years ago
Andrew Tridgell	8916b280fd	SITL: filled in more of the HAL SITL backend	12 years ago
Andrew Tridgell	18824c7ef5	AP_HAL: expose argc/argv in hal.init() ... used for SITL port	12 years ago
Pat Hickey	54bab59066	AP_HAL_AVR_SITL: add initial scaffolding	12 years ago