5 Commits (5760239670c76bfdf4c466a0a2a590701f016360)

Author SHA1 Message Date
Andrew Tridgell 5130a37a9e autotest: automatically pause when SITL sim stops 13 years ago
Andrew Tridgell f96a48e42b autotest: support all 11 PWM output channels 13 years ago
Andrew Tridgell 66d65121cc autotest: switch to big-endian metric packets internally 13 years ago
Andrew Tridgell cf7073128d autotest: adapt test suite to new simulation framework 13 years ago
Andrew Tridgell 05c6734ca2 autotest: added runsim.py 13 years ago